Display device with combined driving methods

A display device, comprising:

• a pixel circuit connected to a luminous element to express a gradation value of image data comprising a most significant bit (MSB), at least one middle bit, and a least significant bit (LSB), the pixel circuit comprising a pulse width modulation (PWM) driving circuit and a pulse amplitude modulation (PAM) driving circuit;
• and
• a processor configured to:
• determine whether a single bit value of the MSB of the image data is “0” or “1”;
• select the PAM driving circuit or the PWM driving circuit based on the single bit value of the MSB of the image data;
• generate a driving method selection signal to select one of the PAM driving circuit or the PWM driving circuit based on a selection result;
• and
• control light emission of the luminous element by an operation of the PWM driving circuit or an operation of the PAM driving circuit based on the driving method selection signal,
• wherein, when a value of the MSB of the image data is “1”, the PAM driving circuit is selected to express the gradation value of the image data with the MSB being “1”, and
• when the value of the MSB is “0”, the PWM driving circuit is selected to express the gradation value of the image data with the MSB being “0”.

A display device comprising:

• a plurality of pixels, wherein each of the plurality of pixels includes a pulse width modulation (PWM) driving circuit and a pulse amplitude modulation (PAM) driving circuit and drives light emission of a luminous element by an operation of the PWM driving circuit or the PAM driving circuit based on a driving method selection signal;
• a lookup table containing correspondence between gradation representation bit values and region representation bit values;
• a bit converter configured to convert image data into a combination of region representation bits and gradation representation bits by referring to the lookup table;
• and
• a processor configured to generate the driving method selection signal to select one of the PAM driving circuit to express the gradation representation bits when the region representation bits indicate a high-gradation region or the PWM driving circuit to express the gradation representation bits when the region representation bits indicate a low-gradation region.