Secure access to memory in an integrated circuit
AssigneeMarvell Israel (M.I.S.L) Ltd.
InventorsNitzan Dror, Roman Nos
Life of this patent
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Abstract
An integrated circuit (IC) chip includes a first memory that stores first information, and a second memory that stores second information that it to be protected from unauthorized access. Communication interface circuitry gives a processor external to the IC chip read access and/or write access to components of the IC chip. Embedded hardware security circuitry selectively provides the processor external to the IC chip with secure access to the second memory. Interconnect circuitry i) selectively grants the processor unsecured access to the first memory via the communication interface circuitry, ii) selectively grants the processor access to the embedded hardware security, and iii) limits access to the second memory.
Claims22
An integrated circuit (IC) chip for a network device, the IC chip comprising:
- one or more first memories of the network device, the one or more first memories configured to store first information;
- one or more second memories of the network device, the one or more second memories configured to store second information that is to be protected from unauthorized access;
- communication interface circuitry that is configured to give a processor external to the IC chip read access and/or write access to components of the IC chip;
- embedded hardware security circuitry coupled to the communication interface circuitry, the embedded hardware security circuitry configured to selectively provide the processor external to the IC chip with secure access to the one or more second memories;
- and
- interconnect circuitry that is coupled to i) the one or more first memories, ii) the one or more second memories, iii) the communication interface circuitry, and iv) the embedded hardware security circuitry, the interconnect circuitry configured to i) selectively grant the processor unsecured access to the one or more first memories via the communication interface circuitry, ii) selectively grant the processor access to the embedded hardware security, and iii) limit access to the one or more second memories while providing the embedded hardware security circuitry access to the one or more second memories;
- wherein the embedded hardware security circuitry is configured to use the interconnect circuitry to provide the processor external to the IC chip with secure access to the one or more second memories.
A method for accessing an integrated circuit (IC) chip of a network device, the method comprising:
- receiving, at communication interface circuitry of the IC chip, a first memory access request to access a first memory of the IC chip from a processor that is external to the IC chip, the first memory storing information for use by the network device;
- forwarding, by interconnect circuitry of the IC chip, the first request to the first memory;
- servicing, by the first memory, the first memory access request via the communication interface circuitry;
- blocking, at the interconnect circuitry, direct access to a second memory of the IC chip via the communication interface circuitry in response to requests i) that are received at the communication interface circuitry, and ii) that request access to the second memory of the IC chip, the second memory configured to store information for use by the network device and that is to be protected from unauthorized external access;
- receiving, at communication interface circuitry of the IC chip, a second memory access request to access the second memory of the IC chip from the processor that is external to the IC chip;
- forwarding, by the interconnect circuitry of the IC chip, the second request to embedded hardware security circuitry of the IC chip;
- granting, by the interconnect circuitry of the IC chip, the embedded hardware security circuitry access to the one or more second memories;
- selectively providing, by the embedded hardware security circuitry, secure access to the second memory to service the second memory access request using the interconnect circuitry;
- and
- servicing, by the second memory, the second memory access request via the embedded hardware security circuitry and the communication interface circuitry.
Dependencies are inferred from the claim text.