Efficient exception handling in trusted execution environments
AssigneeIntel Corporation
InventorsScott Constable, Bin Xing, Yuan Xiao, Krystof Zmudzinski, Mona Vij, Mark Shanahan, Francis McKeen, Ittai Anati
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AssigneeIntel Corporation
InventorsScott Constable, Bin Xing, Yuan Xiao, Krystof Zmudzinski, Mona Vij, Mark Shanahan, Francis McKeen, Ittai Anati
Estimating the term…
Systems, methods, and apparatuses relating efficient exception handling in trusted execution environments are described. In an embodiment, a hardware processor includes a register, a decoder, and execution circuitry. The register has a field to be set to enable an architecturally protected execution environment at one of a plurality of contexts for code in an architecturally protected enclave in memory. The decoder is to decode an instruction having a format including a field for an opcode, the opcode to indicate that the execution circuitry is to perform a context change. The execution circuitry is to perform one or more operations corresponding to the instruction, the one or more operations including changing, within the architecturally protected enclave, from a first context to a second context.
A hardware processor comprising:
A method comprising:
A system comprising:
Dependencies are inferred from the claim text.