Systems, methods, and apparatus to enable data aggregation and adaptation in hardware acceleration subsystems

A system comprising:

• a plurality of schedulers, each associated with a pattern adapter;
• a plurality of hardware accelerators respectively coupled to the plurality of schedulers;
• a plurality of load store engines respectively associated with the plurality of hardware accelerators;
• a memory coupled to the plurality of load store engines;
• and
• a direct memory access (DMA) circuit coupled to the memory.

A method comprising:

• processing, using a first processing circuit, a set of data to produce a first set of data elements;
• storing the first set of data elements in a memory;
• determining that a count of elements of the first set of data elements meets an aggregation threshold;
• processing, using a second processing circuit, the first set of data elements to produce a second set of data elements;
• determining whether a count of the elements of the second set of data elements meets the aggregation threshold;
• and
• processing the second set of data elements, using a third processing circuit, based on the count of element of the second set of data elements satisfying the aggregation threshold.