Reordering memory controller

A memory controller for queuing memory operation requests, the memory controller comprising:

• a queue to store memory operation requests ordered based on relative times of receipt in a fixed set of ordered request slots, the memory operation requests associated with multiple different memory banks of a memory device, wherein at least one of the ordered request slots stores a request pair including both a first row request for activating a row of a first bank and a corresponding first column request for performing a read or write for the row of the first bank;
• an input register to store a new request;
• request selection logic to select, in a given memory controller cycle based on ordering constraints and relative positions of the memory operation requests in the fixed set of ordered request slots indicating the relative times of receipt, the first row request for activating the row of the first bank, and concurrently selecting a second column request for issuing to a second bank separate from the first bank, wherein the first row request and the second column request are selected in the same memory controller cycle;
• queue update logic to update the queue to remove the second column request from the queue and to shift at least a subset of remaining requests between the ordered request slots such that a slot vacated by the second column request is filled and a slot corresponding to the request pair remains filled by the first column request, and to add the new request from the input register to the ordered request slots adjacent to the shifted subset of remaining requests in the queue, wherein the requests are maintained in the queue in time order and positioned in a compressed set of adjacent slots of the fixed set of ordered request slots;
• and
• an output register to receive the first row request and the second column request, and to issue the first row request and the second column request to separate banks of the memory device during the same memory controller cycle.

A memory system comprising:

• a memory device;
• and
• a memory controller for queuing memory operation requests, the memory controller comprising:
• a queue to store memory operation requests ordered based on relative times of receipt in a fixed set of ordered request slots, the memory operation requests associated with multiple different memory banks of a memory device, wherein at least one of the ordered request slots stores a request pair including both a first row request for activating a row of a first bank and a corresponding first column request for performing a read or write for the row of the first bank;
• an input register to store a new request;
• request selection logic to select, in a given memory controller cycle based on ordering constraints and relative positions of the memory operation requests in the fixed set of ordered request slots indicating the relative times of receipt, the first row request for activating the row of the first bank, and concurrently selecting a second column request for issuing to a second bank separate from the first bank, wherein the first row request and the second column request are selected in the same memory controller cycle;
• queue update logic to update the queue to remove the second column request from the queue and to shift at least a subset of remaining requests between the ordered request slots such that a slot vacated by the second column request is filled and a slot corresponding to the request pair remains filled by the first column request, and to add the new request from the input register to the ordered request slots adjacent to the shifted subset of remaining requests in the queue, wherein the requests are maintained in the queue in time order and positioned in a compressed set of adjacent slots of the fixed set of ordered request slots;
• and
• an output register to receive the first row request and the second column request, and to issue the first row request and the second column request to separate banks of the memory device during the same memory controller cycle.