Semiconductor package
AssigneeSamsung Electronics Co., Ltd.
InventorsSeongho Shin, Jonghyeon Kim
Life of this patent
Estimating the term…
Abstract
Disclosed is a semiconductor package comprising a solder ball, a printed circuit board on the solder ball, a bump on the printed circuit board, and a semiconductor chip on the bump. The printed circuit board includes a base substrate, a low-k dielectric layer that penetrates the base substrate, a connection conductive structure electrically connected to the bump and surrounded by the low-k dielectric layer, and a lower conductive structure electrically connected to the solder ball and the connection conductive structure. A top surface of the lower conductive structure is in contact with a first bottom surface of the low-k dielectric layer.
Claims19
A semiconductor package, comprising:
- a solder ball;
- a printed circuit board on the solder ball;
- a bump on the printed circuit board;
- and
- a semiconductor chip on the bump,
- wherein the printed circuit board includes:
- a base substrate;
- a low-k dielectric layer that penetrates the base substrate from an upper surface of the base substrate to a lower surface of the base substrate;
- a connection conductive structure electrically connected to the bump and surrounded by the low-k dielectric layer;
- and
- a lower conductive structure electrically connected to the solder ball and the connection conductive structure,
- wherein a top surface of the lower conductive structure is in contact with a first bottom surface of the low-k dielectric layer.
A semiconductor package, comprising:
- a solder ball;
- a printed circuit board on the solder ball;
- a bump on the printed circuit board;
- and
- a semiconductor chip on the bump,
- wherein the printed circuit board includes:
- a low-k dielectric layer;
- a base substrate that surrounds the low-k dielectric layer;
- a connection conductive structure that is electrically connected to the bump and penetrates the low-k dielectric layer in a vertical direction;
- and
- a lower conductive structure electrically connected to the solder ball and the connection conductive structure,
- wherein the lower conductive structure is at a level lower than a level of the base substrate.
A semiconductor package, comprising:
- a solder ball;
- a printed circuit board on the solder ball;
- a bump on the printed circuit board;
- a semiconductor chip on the bump;
- and
- an adhesion layer between the semiconductor chip and the printed circuit board,
- wherein the printed circuit board includes:
- a base substrate;
- an upper solder resist layer that covers a top surface of the base substrate;
- a lower solder resist layer that covers a bottom surface of the base substrate;
- a low-k dielectric layer that penetrates the base substrate;
- a connection conductive structure electrically connected to the bump and surrounded by the low-k dielectric layer;
- and
- a lower conductive structure electrically connected to the solder ball and the connection conductive structure,
- wherein a top surface of the lower conductive structure is in contact with a first bottom surface of the low-k dielectric layer and a bottom surface of the connection conductive structure,
- wherein the lower solder resist layer covers a second bottom surface of the low-k dielectric layer and a bottom surface of the lower conductive structure, and
- wherein the second bottom surface of the low-k dielectric layer is at a level lower than a level of the first bottom surface of the low-k dielectric layer.
Dependencies are inferred from the claim text.