GaN device with uniform electric field

An enhancement mode column III nitride transistor, comprising:

• a channel comprising a conductive two-dimensional electron gas (2DEG) formed in a channel layer at a junction with a barrier layer;
• a gate, and drain and source contacts, positioned above the barrier layer, wherein the gate is disposed between the source and drain contacts;
• and
• a barrier offset layer comprising an insulator positioned above the barrier layer and disposed between the gate and the drain contact, wherein the barrier offset layer has an edge or transition laterally offset from the gate, wherein net electron donor density in the channel layer under barrier offset layer is higher than net electron donor density in the channel layer nearer the gate without the barrier offset layer, such that 2DEG density in the channel layer nearer the gate is higher than 2DEG density in the channel layer under the barrier offset layer;
• a multi-region field plate overlaying and overlapping at least a portion of the gate nearest the drain contact and overlapping a portion of the barrier offset layer, the multi-region field plate having a plurality of sections including a section of increased height with respect to the channel layer over the portion of the gate nearest the drain contact, and a section of reduced height with respect to the channel layer over the edge or transition of the barrier offset layer to reduce the electric field at the edge or transition of the barrier offset layer;
• and
• an additional field plate under and at least partially overlapping with the multi-region field plate, the additional field plate include a step in height, and the multi-region field plate also including a corresponding step in height over the additional field plate, whereby the step in height of the additional field plate and the corresponding step in height of the multi-region field plate serve to reduce the electric field at the corner of the gate nearest the drain contact.