Seeded growth for 2D nanoribbon transistors

An integrated circuit (IC) device, comprising:

• a power supply coupled to an IC die by a substrate;
• and
• a transistor on the IC die, the transistor comprising:
• a source structure coupled to a drain structure by a plurality of channel regions, wherein an individual one of the channel regions comprises a first material, the first material comprising a metal and a chalcogen, and a second material is between one of the source and drain structures and an individual one of the channel regions;
• and
• a gate structure adjacent the channel regions.

A method, comprising:

• receiving a stack of first and second layers over a substrate;
• creating one or more first voids on a first side of the first layers by removing first portions of the first layers and retaining second portions of the first layers;
• depositing a first material in the first voids, wherein the first material adjoins the second portions;
• creating one or more second voids adjacent the first material by removing the second portions;
• and
• forming one or more channel regions of a second material in the second voids, wherein the second material comprises a metal and a chalcogen, and the second material adjoins the first material.