Compensated digital-to-analog converter (DAC)
AssigneeTexas Instruments Incorporated
InventorsMeghna Agrawal, Debapriya Sahu
Life of this patent
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Abstract
A circuit includes a digital-to-analog converter (DAC) and a compensation circuit. The DAC has first and second terminals. The compensation circuit includes a capacitor and a transistor. The capacitor has first and second terminals, with the first terminal of the capacitor coupled to the first terminal of the DAC. The transistor has a source coupled to the second terminal of the capacitor, and has a gate coupled to the second terminal of the DAC.
Claims20
An analog-to-digital converter (ADC) comprising:
- N current-steering digital-to-analog converters (DACs), wherein the ADC is an N-order sigma delta ADC, and wherein N is a positive integer greater than 0;
- wherein each of the N current steering DACs comprises:
- first and second output terminals,
- a first current source having a first terminal coupled to a supply voltage terminal, a second terminal, and a third terminal;
- a first transistor having a first current path terminal coupled to the second terminal of the first current source, and a second current path terminal coupled to the first output terminal;
- a second transistor having a first current path terminal coupled to the second terminal of the first current source, and a second current path terminal coupled to the second output terminal;
- and
- a first circuit having a first terminal coupled to the third terminal of the first current source, and a second terminal coupled to the first current path terminal of the first transistor and the first current path terminal of the second transistor, the first circuit comprising a first capacitor coupled to the third terminal of the first current source at the first terminal of the first circuit.
A current-steering digital-to-analog converter (DAC) comprising:
- first and second output terminals;
- a power supply terminal;
- a first transistor having a current path coupled between the power supply terminal and a first intermediate node;
- a second transistor having a current path coupled between the first intermediate node and a second intermediate node;
- a third transistor having a current path coupled between the second intermediate node and the first output terminal;
- a fourth transistor having a current path coupled between the second intermediate node and the second output terminal;
- and
- a first circuit having a first terminal coupled to the first intermediate node and a second terminal coupled to the second intermediate node, the first circuit comprising a first capacitor coupled to the first intermediate node at the first terminal of the first circuit.
An analog-to-digital converter (ADC) comprising:
- N current-steering digital-to-analog converters (DACs), wherein the ADC is an N-order sigma delta ADC, and wherein N is a positive integer greater than 0;
- wherein each of the N current steering DACs comprises:
- first and second output terminals;
- a first current source;
- a first circuit having a first capacitor coupled to the first current source;
- a first transistor coupled between the first current source and the first output terminal;
- and
- a second transistor coupled between the first current source and the second output terminal;
- and
- a comparator having a first input coupled to the first output terminal of a first current-steering DAC of the N current-steering DACs, and a second input coupled to the second output terminal of the first current-steering DAC.
Dependencies are inferred from the claim text.