US 12,695,421 B1Granted

Integrated oscillator of low noise

AssigneeRealtek Semiconductor Corp.

InventorChia-Liang (Leon) Lin

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Abstract

An LC (inductor-capacitor) oscillator includes a first NMOS (n-channel metal oxide semiconductor) transistor, a first PMOS (p-channel metal oxide semiconductor) transistor, a second NMOS transistor, and a second PMOS transistor, wherein: the source of the first NMOS transistor is shorted to the source of the first PMOS transistor; the source of the second NMOS transistor is shorted to the source of the second PMOS transistor; the first NMOS transistor and the second NMOS transistor are cross coupled via a first gate inductor and a first drain inductor; the first and second PMOS transistors are cross coupled via a second gate inductor and a second drain inductor; the first NMOS transistor and the first PMOS transistor are coupled via a first gate capacitor and a first drain capacitor; and the second NMOS transistor and the second PMOS transistor are coupled via a second gate capacitor and a second drain capacitor.

Claims10

Dependent claims

An LC (inductor-capacitor) oscillator comprising:

a first NMOS (n-channel metal oxide semiconductor) transistor with source, gate, and drain connected to a first node, a second node, and a third node, respectively;
a second NMOS transistor with source, gate, and drain connected to a fourth node, a fifth node, and a sixth node, respectively;
a first PMOS (p-channel metal oxide semiconductor) transistor with source, gate, and drain connected to the first node, a seventh node, and an eighth node, respectively;
a second PMOS transistor with source, gate, and drain connected to the fourth node, a nineth node, and a tenth node, respectively;
a first gate inductor inserted between the second node and the fifth node with a center tap connected to a first gate bias node;
a second gate inductor inserted between the seventh node and the nineth node with a center tap connected to a second gate bias node;
a first drain inductor inserted between the third node and the sixth node with a center tap connected to a power supply node;
a second drain inductor inserted between the eighth node and the tenth node with a center tap connected to a ground node;
a first gate capacitor inserted between the second node and the seventh node;
a second gate capacitor inserted between the fifth node and the nineth node;
a first drain capacitor inserted between the third node and the eighth node;
and
a second drain capacitor inserted between the sixth node and the tenth node.

10 more elements

An LC (inductor-capacitor) oscillator comprising a first NMOS (n-channel metal oxide semiconductor) transistor, a first PMOS (p-channel metal oxide semiconductor) transistor, a second NMOS transistor, and a second PMOS transistor, wherein:

source of the first NMOS transistor is shorted to source of the first PMOS transistor;
source of the second NMOS transistor is shorted to source of the second PMOS transistor;
gate of the first NMOS transistor links to gate of the second NMOS transistor through a first gate inductor, of which a center tap connects to a first gate bias node;
gate of the first PMOS transistor links to gate of the second PMOS transistor through a second gate inductor, of which a center tap connects to a second gate bias node;
drain of the first NMOS transistor links to drain of the second NMOS transistor through a first drain inductor, of which a center tap connects to a power supply node;
drain of the first PMOS transistor links to drain of the second PMOS transistor through a second drain inductor, of which a center tap connects to a ground node;
the gate of the first NMOS transistor links to the gate of the first PMOS transistor through a first gate capacitor;
the gate of the second NMOS transistor links to the gate of the second PMOS transistor through a second gate capacitor;
the drain of the first NMOS transistor links to the drain of the first PMOS transistor through a first drain capacitor;
the drain of the second NMOS transistor links to the drain of the second PMOS transistor through a second drain capacitor;
the first gate inductor is strongly coupled to the second drain inductor;
and
the second gate inductor is strongly coupled to the first drain inductor.

10 more elements

Dependencies are inferred from the claim text.

Facts

Application: 19/245,459Filed 23 Jun 2025
Granted: 28 Jul 2026
Term ends: Not estimatedThe source records don’t support an estimate.

Classification11 codes

H03B 5/1212
Using multiple transistors for amplification: the amplifier comprising a pair of transistors, wherein an output terminal of each being connected…
H03B 5/1209
Using multiple transistors for amplification: the amplifier having two current paths operating in a differential manner and a current source or…
H03B 5/1215
The amplifier comprising a pair of transistors, wherein an output terminal of each being connected to an input terminal of the other, e.g. a…
H03B 5/1218
Using multiple transistors for amplification: the generator being of the balanced type