Semiconductor device and stack type semiconductor memory device including the same
AssigneeSK hynix Inc.
InventorMin Sik Han
Life of this patent
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Abstract
A semiconductor memory device includes a core block including a plurality of unit memory blocks, a peripheral circuit block including a data input/output pad, a through electrode configured to exchange signals with another semiconductor memory device, and a data input/output circuit coupled to the through electrode, the core block, and the peripheral circuit block and configured to share one receiver in order to transmit a signal from the through electrode to the peripheral circuit block and in order to transmit a signal from the through electrode to the core block.
Claims18
A semiconductor memory device comprising:
- a core block comprising a plurality of unit memory blocks;
- a peripheral circuit block comprising a data input/output pad;
- a through electrode configured to exchange signals with another semiconductor memory device;
- and
- a data input/output circuit coupled to the through electrode, the core block, and the peripheral circuit block and configured to share one receiver in order to transmit a signal from the through electrode to the peripheral circuit block and in order to transmit a signal from the through electrode to the core block.
A semiconductor memory device comprising:
- a core block comprising a plurality of unit memory blocks;
- a peripheral circuit block comprising a data input/output pad;
- a through electrode configured to exchange signals with another semiconductor memory device;
- a receiver coupled to the through electrode;
- a read multiplexer configured to transmit, to the peripheral circuit block, an output signal that is output by the receiver in response to a multi-chip operation signal after a start of a read operation;
- and
- an external processing signal line that is shared by the receiver and the read multiplexer.
A stack type semiconductor memory device comprising:
- a plurality of semiconductor chips that are coupled through a plurality of through electrodes,
- wherein at least one of the plurality of semiconductor chips comprises a core block comprising a plurality of unit memory blocks, a peripheral circuit block comprising a data input/output pad, a through electrode configured to exchange signals with another semiconductor memory device, and a data input/output circuit,
- wherein the data input/output circuit comprises,
- an external processing signal line,
- a read multiplexer configured to selectively output a plurality of signals to the peripheral circuit block or the external processing signal line,
- a write multiplexer configured to selectively output a plurality of signals to the peripheral circuit block or the external processing signal line,
- a receiver configured to transmit a signal from the through electrode to the peripheral circuit block and to transmit a signal from the through electrode to the core block, and
- a transmitter configured to transmit a signal from the core block to the through electrode and to transmit a signal from the peripheral circuit block to the through electrode.
Dependencies are inferred from the claim text.