Systems and methods for programmable fabric design compilation
AssigneeAltera Corporation
InventorsYi Peng, Scott Jeremy Weber, Mahesh A. Iyer
Life of this patent
Estimating the term…
Abstract
Systems or methods of the present disclosure may provide a compilation design method that uses cloud computing resources and/or distributed computing resources to compile initial user designs. The initial user design for the programmable logic device may be partitioned into multiple designs for compilation based on periphery logic and core fabric logic. The compilation design method implements partition-level time budgeting and constraint generation using full device timing analysis. The final placed and routed netlist and bitstream SOF is generated by merging the placed and routed netlist and bitstream SOF of individual partition designs.
Claims19
A system comprising:
- memory storing instructions;
- and
- a processor that, when executing the instructions, performs operations comprising:
- receiving a full design comprising a user design for a programmable fabric of a programmable logic device;
- dividing the full design proportionally into a plurality of design partitions based on one or more partitions defined on the programmable logic device;
- cause a compilation of the plurality of design partitions in parallel at a plurality of compute nodes of the system;
- and
- combining the compiled plurality of design partitions into an output final device image.
A method comprising:
- receiving a full design comprising a user design for a programmable fabric of a programmable logic device;
- dividing, via one or more processors, the full design proportionally into a plurality of design partitions based on one or more partitions defined on the programmable logic device, wherein the plurality of design partitions correspond to core fabric logic and periphery logic;
- and
- compiling, via the one or more processors, the plurality of design partitions in parallel at a plurality of compute nodes of a computer system.
A system comprising:
- memory storing instructions;
- and
- a processor that, when executing the instructions, performs operations comprising:
- receiving a full design comprising a user design for a programmable fabric of a programmable logic device;
- dividing the full design proportionally into a plurality of design partitions based on one or more partitions defined on the programmable logic device, and wherein the plurality of design partitions are further divided into one or more block-level designs based on partitions of the programmable logic device;
- cause a compilation of the plurality of design partitions in parallel at a plurality of compute nodes of the system to generate a periphery logic image and one or more block-level images;
- and
- combining the periphery logic image and the one or more block-level images into an output final device image.
Dependencies are inferred from the claim text.