Staircase structure in three-dimensional memory device and method for forming the same
AssigneeYangtze Memory Technologies Co., Ltd.
InventorsDi Wang, Wenxi Zhou, Zhiliang Xia, Zhong Zhang
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Abstract
In an example of the present disclosure, a three-dimensional (3D) memory device includes a memory array structure and a staircase structure. The staircase structure includes a plurality of stairs extending along a first lateral direction. The plurality of stairs include a stair including a conductor portion on a top surface of the stair. The conduction portion is connected to the memory array structure. Widths of conductor portions are different in a second lateral direction perpendicular to the first lateral direction.
Claims20
A three-dimensional (3D) memory device, comprising:
- a memory array structure;
- and
- a staircase structure comprising a plurality of stairs extending along a first lateral direction, wherein a stair of the plurality of stairs comprises a conductor portion on a top surface of the stair and a dielectric layer, the conductor portion being connected to the memory array structure,
- wherein:
- in the stair of the plurality of stairs, a width of the conductor portion, in the first lateral direction, varies along a second lateral direction perpendicular to the first lateral direction;
- the conductor portion extends laterally to connect a conductor layer of the memory array structure at a same vertical level as the conductor portion;
- and
- in the second lateral direction, a dielectric portion is adjacent to an end of the conductor portion at the same vertical level, and the dielectric layer extends continuously below the dielectric portion and the conductor portion.
A three-dimensional (3D) memory device, comprising:
- a memory array structure;
- and
- a staircase structure comprising a plurality of stairs extending along a first lateral direction, wherein a stair of the plurality of stairs comprises a conductor portion on a top surface of the stair and a dielectric layer, the conductor portion being connected to the memory array structure,
- wherein:
- widths of conductor portions in a second lateral direction perpendicular to the first lateral direction decrease along the first lateral direction away from the memory array structure;
- the conductor portion extends laterally to connect a conductor layer of the memory array structure at a same vertical level as the conductor portion;
- and
- in the second lateral direction, a dielectric portion is adjacent to an end of the conductor portion at the same vertical level, and the dielectric layer extends continuously below the dielectric portion and the conductor portion.
A three-dimensional (3D) memory device, comprising:
- a first memory array structure;
- a second memory array structure;
- and
- a staircase structure in an intermediate of the first memory array structure and the second memory array structure each comprising a plurality of memory cells and located at one side of the staircase structure along a first lateral direction, the staircase structure comprising a plurality of stairs extending along the first lateral direction, and a bridge structure in contact with the first memory array structure and the second memory array structure,
- wherein:
- a stair of the plurality of stairs comprises a conductor portion on a top surface of the stair and a dielectric layer, and is connected to the first memory array structure and the second memory array structure through the bridge structure;
- the conductor portion extends laterally to connect a conductor layer of one of the first memory array structure or the second memory array structure at a same vertical level as the conductor portion;
- and
- in a second lateral direction perpendicular to the first lateral direction, a dielectric portion is adjacent to an end of the conductor portion at the same vertical level, and the dielectric layer extends continuously below the dielectric portion and the conductor portion.
Dependencies are inferred from the claim text.