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US 12,687,793 B2Granted
Multiple targets on substrate layers for layer alignment
AssigneeIntel Corporation
InventorShakul Tandon
Life of this patent
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Abstract
Embodiments described herein may be related to apparatuses, processes, and techniques related to using full stack overlay cell (FSOL) targets within lithography masks and on fabricated layers of a substrate in order to align or to assess the alignment of fabricated layers of the substrate during the substrate manufacturing process. Other embodiments may be described and/or claimed.
Claims8
A substrate comprising:
- a plurality of layers;
- a plurality of targets on each of the plurality of layers;
- wherein individual ones of the plurality of the targets on a first layer of the plurality of the layers overlap, respectively, with a corresponding one of the plurality of the targets on a second layer of the plurality of layers in a top-down view;
- wherein the plurality of targets on the first layer include a first pattern with a metal feature having a longest dimension along a first direction;
- wherein the plurality of targets on the second layer include a second pattern with a metal feature overlapping the metal feature of the first pattern in the top-down view, the metal feature of the second pattern having a longest dimension along a second direction, the second direction orthogonal to the first direction in the top-down view;
- and
- wherein the first pattern is different than the second pattern.
4 more elements
Dependencies are inferred from the claim text.