Semiconductor device and manufacturing method thereof
AssigneeTaiwan Semiconductor Manufacturing Company, Ltd.
InventorsYen-Chih Huang, Li-An Sun, Chih-Hao Chen, Chung-Chuan Huang
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Abstract
A semiconductor device includes a FEOL structure and a BEOL structure. The BEOL structure is formed over the FEOL structure and includes a conductive layer, an etching stop layer (ESL) structure, a through via and a barrier layer. The ESL structure is formed over the conductive layer and has a first recess and a lateral surface. The through via passes through the ESL structure to form the first recess and the lateral surface. The barrier layer covers the lateral surface and the first recess. The first recess is recessed with respect to the lateral surface, and the first recess has a first depth ranging between 1 nm and 7 nm.
Claims20
A manufacturing method for a semiconductor device, comprising:
- forming a FEOL structure;
- and
- forming a BEOL structure over the FEOL structure, comprising:
- forming an ESL structure over a conductive layer;
- forming a first hole to pass through a portion of the ESL structure, wherein the ESL structure forms a lateral surface and a first recess recessed with respect to the lateral surface;
- forming a barrier layer over the lateral surface and the first recess;
- forming a filling portion within the first recess;
- forming a second hole to pass through another portion of the ESL structure, wherein at least one portion of the filling portion is removed, and the second hole exposes the conductive layer.
A manufacturing method for a semiconductor device, comprising:
- forming a FEOL structure;
- and
- forming a BEOL structure over the FEOL structure, comprising:
- forming an ESL structure over a conductive layer;
- forming a first hole to pass through a portion of the ESL structure, wherein the ESL structure forms a lateral surface and a first recess recessed with respect to the lateral surface;
- forming a barrier layer over the lateral surface and the first recess;
- forming a filling portion within the first recess;
- forming a second hole to pass through another portion of the ESL structure, wherein at least one portion of the filling portion is removed, and the second hole exposes the conductive layer;
- and
- wherein the first recess has a first depth ranging between 1 nm and 7 nm.
A manufacturing method for a semiconductor device, comprising:
- forming a FEOL structure;
- and
- forming a BEOL structure over the FEOL structure, comprising:
- forming an ESL structure over a conductive layer;
- forming a first hole to pass through a portion of the ESL structure, wherein the ESL structure forms a lateral surface and a first recess recessed with respect to the lateral surface;
- forming a barrier layer over the lateral surface and the first recess;
- forming a filling portion within the first recess;
- forming a second hole to pass through another portion of the ESL structure, wherein at least one portion of the filling portion is removed, and the second hole exposes the conductive layer;
- and
- wherein the barrier layer is a single and contiguous layer.
Dependencies are inferred from the claim text.