Phase-change random access memory device and method of forming the same

A memory device, comprising:

• a word line disposed in an interconnect-level dielectric layer stack;
• a selector disposed over the word line in the interconnect-level dielectric layer stack;
• a phase change layer disposed over the selector in the interconnect-level dielectric layer stack, the phase change layer comprising:
• a first layer of doped chalcogenide material containing a first dopant element;
• a first layer of undoped chalcogenide material disposed above and in contact with the first layer of doped chalcogenide material;
• a second layer of doped chalcogenide material containing a second dopant element that is different than the first dopant element, wherein the second layer of doped chalcogenide material is disposed above and in contact with the first layer of undoped chalcogenide material;
• and
• a second layer of undoped chalcogenide material disposed above and in contact with the second layer of doped chalcogenide material;
• a sidewall barrier layer in contact with sidewalls of the phase change layer;
• and
• a bit line disposed over the phase change layer in the interconnect-level dielectric layer stack,
• wherein the second layer of undoped chalcogenide material is disposed adjacent to the bit line, and the first layer of doped chalcogenide material is disposed on and in contact with a top surface of a second barrier electrode of the selector, and
• wherein a top surface of the sidewall barrier layer is in contact with a bottom surface of the bit line, and a bottom surface of the sidewall barrier layer is in contact with the top surface of the second barrier electrode of the selector.

A memory device, comprising:

• a word line disposed in an interconnect-level dielectric layer stack;
• a bit line disposed over the word line in the interconnect-level dielectric layer stack;
• a selector disposed in the interconnect-level dielectric layer stack;
• a phase change layer disposed between the world line and the bit line, the phase change layer comprising:
• a first layer of doped chalcogenide material containing a first metallic dopant element;
• a first layer of undoped chalcogenide material disposed adjacent the first layer of doped chalcogenide material;
• a second layer of doped chalcogenide material containing a second metallic dopant element that is different than the first metallic dopant element, and the second layer of doped chalcogenide material is disposed adjacent the first layer of undoped chalcogenide material;
• and
• a second layer of undoped chalcogenide material disposed adjacent the second layer of doped chalcogenide material and the bit line;
• and
• a sidewall barrier layer in contact with sidewalls of the phase change layer,
• wherein the first layer of doped chalcogenide material is disposed on and in contact with a top surface of a first barrier electrode of the selector, and
• wherein a top surface of the sidewall barrier layer is in contact with a bottom surface of the bit line, and a bottom surface of the sidewall barrier layer is in contact with the top surface of the first barrier electrode of the selector.