Structure and related method for source/drain terminal within subcollector
AssigneeGlobalFoundries U.S. Inc.
InventorsUppili S. Raghunathan, Aaron L. Vallett, Venkata Narayana Rao Vanukuru, Steven M. Shank
Life of this patent
Estimating the term…
Abstract
The disclosure provides structures and related methods to provide a source/drain (S/D) terminal within a subcollector. A structure according to the disclosure includes a field effect transistor (FET) structure having a source/drain (S/D) terminal within a semiconductor layer, and a gate structure on the semiconductor layer. A bipolar transistor (BT) structure is on the FET structure and includes a subcollector within the semiconductor layer, and a collector-base-emitter stack on the subcollector and above the semiconductor layer.
Claims20
A structure comprising:
- a field effect transistor (FET) structure including:
- a source/drain (S/D) terminal within a semiconductor layer, and
- a gate structure on the semiconductor layer;
- a bipolar transistor (BT) structure on the FET structure, the BT structure including:
- a subcollector within the semiconductor layer, and
- a collector-base-emitter stack on the subcollector and above the semiconductor layer;
- and
- an intra-terminal insulator within a portion of the S/D terminal distal to the collector-base-emitter stack wherein the S/D terminal horizontally surrounds the intra-terminal insulator.
A structure comprising:
- a field effect transistor (FET) structure including:
- a source/drain (S/D) terminal within a semiconductor layer, and
- a gate structure on the semiconductor layer;
- a bipolar transistor (BT) structure on the FET structure, the BT structure including:
- a subcollector within the semiconductor layer, wherein the S/D terminal is coextensive with the subcollector, and
- a collector-base-emitter stack on the subcollector and above the semiconductor layer, wherein the collector-base-emitter stack is horizontally adjacent the gate structure;
- and
- an intra-terminal insulator within a portion of the S/D terminal distal to the collector-base-emitter stack wherein the S/D terminal horizontally surrounds the intra-terminal insulator.
A method comprising:
- forming a field effect transistor (FET) structure including:
- a source/drain (S/D) terminal within a semiconductor layer, and
- a gate structure on the semiconductor layer;
- forming a bipolar transistor (BT) structure on the FET structure, the BT structure including:
- a subcollector within the semiconductor layer, and
- a collector-base-emitter stack on the subcollector and above the semiconductor layer;
- and
- forming an intra-terminal insulator within a portion of the S/D terminal distal to the collector-base-emitter stack wherein the S/D terminal horizontally surrounds the intra-terminal insulator.
Dependencies are inferred from the claim text.