High-speed continuous-time delta-sigma modulator including an amplifier with limited gain

A method comprising:

• receiving a signal at an input of a continuous-time delta-sigma modulator (CTDSM);
• integrating the signal using an integrator circuit including a first amplifier to produce an integrated output;
• shifting noise of the integrated output signal to a relatively higher frequency using a first resonator circuit of the CTDSM to produce a shifted signal;
• and
• scaling the shifted signal using a gain compensation circuit of the CTDSM that is configured to compensate a transfer function of the integrator circuit to produce a scaled output signal.

A modulator circuit comprising:

• an integrator circuit comprising:
• a first amplifier including the input to receive a signal and including the output to provide an inverted signal;
• and
• a capacitor including a first terminal coupled to the input and a second terminal coupled to the output;
• a first resonator circuit including a first resonator input coupled to the output of the integrator circuit and a first resonator output;
• a gain compensation circuit including a gain input coupled to the first resonator output and including a gain output, the gain compensation circuit is configured to compensator for a finite direct current (DC) gain of the integrator circuit to provide a selected transfer function from the input of the first amplifier to the gain output;
• a second resonator circuit including a second resonator input coupled to the gain output and a second resonator output;
• a summing element including a summing input coupled to the second resonator output and including a summing output, the summing element configured to add voltage values from each of the integrator circuit, the first resonator circuit, the gain compensation circuit, and the second resonator circuit to produce an output sum at the summing output;
• a switch including a first switch terminal coupled to the summing output, a switch control terminal, and a second switch terminal;
• a quantizer including a first quantizer input coupled to the second switch terminal, a second quantizer input configured to receive a sampling frequency signal, a first quantizer output coupled to the switch control terminal, and a second quantizer output;
• a shifter circuit including a first shifter input coupled to the second quantizer output, a second shifter input to receive a pseudo-random sequence, and a shifter output;
• and
• a digital-to-analog converter (DAC) including a DAC input coupled to the shifter output and a DAC output coupled to the input of the first amplifier.