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AssigneeZjw Microelectronics North America Inc.
InventorsXiaoqiang Shou, Ziqing Lu
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An input stage circuit for an operational amplifier includes first and second differential pairs connected in parallel between positive and negative input terminals. Each differential pair comprises a pair of transistors that are intentionally and systematically mismatched. The mismatching of each transistor pair creates a pre-trim input offset voltage for the circuit. However, a unique current is utilized to bias each of the first and second differential pairs. By adjusting the differential between the bias currents, a composite input offset voltage is created that combines with the pre-trim input offset voltage to yield a total input offset voltage for the circuit that approaches zero. Additionally, adjusting the differential between the bias currents simultaneously trims the temperature coefficient of the total input offset voltage to zero while using limited power and producing minimal noise.
An input stage circuit for an operational amplifier having first and second input terminals, the input stage circuit comprising:
Dependencies are inferred from the claim text.