Power loss protection and reset signal generation in memory systems
AssigneeYangtze Memory Technologies Co., Ltd.
InventorsQinghuang Weng, Hengwen Wu
Life of this patent
Estimating the term…
Abstract
The present disclosure relates to methods and apparatuses for power loss protection in a memory system. In one example, a memory system includes a memory device, a controller, a power loss protection (PLP) circuit, and a protection circuit. The controller is coupled to the memory device. A reset terminal of the controller is coupled to a capacitor. The protection circuit is coupled to the controller and the PLP circuit. The protection circuit is configured to: receive a PLP output voltage from the PLP circuit, receive a system supply voltage, and provide a reset signal to the reset terminal of the controller in response to determining that the PLP output voltage is lower than a fraction of the system supply voltage.
Claims20
A memory system comprising:
- a memory device;
- a controller coupled to the memory device, wherein a reset terminal of the controller is coupled to a capacitor;
- a power loss protection (PLP) circuit configured to provide PLP output voltage with a stable voltage level during a power failure;
- and
- a protection circuit coupled to the controller and the PLP circuit, wherein the protection circuit is configured to:
- receive the PLP output voltage from the PLP circuit;
- receive a system supply voltage;
- and
- provide a reset signal to the reset terminal of the controller in response to determining that the PLP output voltage is lower than a fraction of the system supply voltage, wherein the protection circuit is configured to pull the reset terminal to ground, by coupling an output of the protection circuit to ground when the PLP output voltage is lower than the fraction of the system supply voltage, to release energy stored in the capacitor due to the power failure.
A power protection apparatus comprising:
- a controller, wherein a reset terminal of the controller is coupled to a capacitor;
- a power loss protection (PLP) circuit configured to provide PLP output voltage with a stable voltage level during a power failure;
- and
- a protection circuit coupled to the controller and the PLP circuit, wherein:
- the protection circuit comprises a comparator and is configured to:
- receive the PLP output voltage of the PLP circuit;
- receive a system supply voltage;
- and
- provide a reset signal to the reset terminal of the controller in response to determining that the PLP output voltage of the PLP circuit is lower than a fraction of the system supply voltage, wherein the protection circuit is configured to pull the reset terminal to ground, by coupling an output of the protection circuit to ground when the PLP output voltage is lower than the fraction of the system supply voltage, to release energy stored in the capacitor due to a power failure;
- a first input of the comparator is coupled to the PLP output voltage;
- a second input of the comparator is coupled to the fraction of the system supply voltage;
- and
- an output of the comparator is coupled to the reset terminal of the controller.
A method for resetting a memory system comprising a memory device, a controller, a power loss protection (PLP) circuit, and a protection circuit, the method comprising:
- receiving, by the protection circuit, a PLP output voltage from the PLP circuit, wherein the PLP output voltage is provided with a stable voltage level during a power failure;
- receiving, by the protection circuit, a system supply voltage;
- and
- providing, by the protection circuit, a reset signal to a reset terminal of the controller in response to determining that the PLP output voltage of the PLP circuit is lower than a fraction of the system supply voltage, wherein the controller is coupled to the memory device, and the reset terminal of the controller is coupled to a capacitor, wherein the protection circuit is configured to pull the reset terminal to ground, by coupling an output of the protection circuit to ground when the PLP output voltage is lower than the fraction of the system supply voltage, to release energy stored in the capacitor due to a power failure.
Dependencies are inferred from the claim text.