Ballast circuit for stabilizing supply voltages in high-speed circuits

A method, comprising:

• generating first and second ballast currents from a first supply voltage and a second supply voltage in response to a write enable signal;
• injecting the first and second ballast currents into first and second pre-amplifier supply voltages to pre-charge parasitic inductances before a writer circuit of a pre-amplifier generates a write current, wherein the writer circuit is coupled between the first pre-amplifier supply voltage and the second pre-amplifier supply voltage;
• and
• de-asserting the first and second ballast currents in response to the writer circuit generating the write current.

A ballast circuit, comprising:

• a programmable delay circuit configured to:
• receive a write enable signal, and
• generate a timing pulse having a duration matching a propagation delay of a writer circuit;
• and
• a configurable current mirror circuit coupled between a first supply voltage and a second supply voltage, the configurable current mirror circuit configured to:
• generate first and second ballast currents in response to the timing pulse,
• inject the first and second ballast currents into first and second pre-amplifier supply voltages to pre-charge parasitic inductances before the writer circuit generates a write current, and
• de-assert the first and second ballast currents in response to the writer circuit generating the write current.