Hardware accessible memory fabric

A client device comprising a memory for storing computer instructions and a processor in communication with the memory, wherein, when the processor executes the computer instructions, the processor is configured to cause the client device to:

• receive a memory allocation request for allocating primary memory from a component of the client device;
• in response to the memory allocation request, select a subset of a region of memory in a memory device to be a portion of primary memory allocated for the client device, wherein the region of memory in the memory device is allocated for the client device before the memory allocation request is received;
• map at least the portion of primary memory to an address space;
• and
• access, by a hardware-accessible interface of the client device, data in the portion of primary memory via a client-side memory access, wherein a communication interface of the memory device is configured to access the subset of the region of memory in the memory device as part of the client-side memory access.

A non-transitory storage medium for storing computer readable instructions, the computer readable instructions, when executed by a processor in a client device, causing the processor to:

• receive a memory allocation request for allocating primary memory from a component of the client device;
• in response to the memory allocation request, select a subset of a region of memory in a memory device to be a portion of primary memory allocated for the client device, wherein the region of memory in the memory device is allocated for the client device before the memory allocation request is received;
• map at least the portion of primary memory to an address space;
• and
• access, by a hardware-accessible interface of the client device, data in the portion of primary memory via a client-side memory access, wherein a communication interface of the memory device is configured to access the subset of the region of memory in the memory device as part of the client-side memory access.