Array substrate and method for manufacturing same, display panel and display device
AssigneeBoe Technology Group Co., Ltd.
InventorsDongfang Wang, Wei Liu, Jie Huang
Life of this patent
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Abstract
Provided is an array substrate. The array substrate includes a base substrate and a driving thin-film transistor disposed on the base substrate. The driving thin-film transistor includes a first gate, a first insulating layer, a first active layer, a second insulating layer, and a first source/drain electrode which are sequentially laminated on the base substrate. The thickness of the first insulating layer is greater than the thickness of the second insulating layer.
Claims17
An array substrate, comprising:
- a base substrate and a driving thin-film transistor disposed on the base substrate, wherein
- the driving thin-film transistor comprises a first gate, a first insulating layer, a first active layer, a second insulating layer, and a first source/drain electrode which are sequentially laminated on the base substrate, a thickness of the first insulating layer being greater than a thickness of the second insulating layer, and the thickness of the first insulating layer being positively correlated with a subthreshold swing of the driving thin-film transistor;
- the driving thin-film transistor further comprises a conductive structure disposed between the second insulating layer and the first source/drain electrode, wherein an orthographic projection of the conductive structure on the base substrate is overlapped with an orthographic projection of the first gate on the base substrate;
- and the first source/drain electrode comprises a first electrode electrically connected with a power supply and a second electrode electrically connected with a light-emitting unit, the second electrode being electrically connected with the conductive structure;
- and
- the driving thin-film transistor further comprises a fourth insulating layer disposed between the conductive structure and the first source/drain electrode, both the fourth insulating layer and the second insulating layer are provided with a plurality of through holes, the first electrode and the second electrode are connected to the first active layer via the trough holes in the fourth insulating layer and the second insulating layer, and the second electrode is further connected to the conductive structure via the through holes in the fourth insulating layer.
A method for manufacturing an array substrate, comprising:
- acquiring a base substrate;
- forming a driving thin-film transistor on the base substrate;
- wherein forming the driving thin-film transistor comprises:
- sequentially forming a first gate and a first insulating layer which are laminated;
- forming a first active layer on the first insulating layer;
- and
- sequentially forming a second insulating layer and a first source/drain electrode on the base substrate on which the first active layer is formed;
- wherein a thickness of the first insulating layer is greater than a thickness of the second insulating layer, and the thickness of the first insulating layer is positively correlated with a subthreshold swing of the driving thin-film transistor;
- the driving thin-film transistor further comprises a conductive structure disposed between the second insulating layer and the first source/drain electrode, wherein an orthographic projection of the conductive structure on the base substrate is overlapped with an orthographic projection of the first gate on the base substrate;
- and the first source/drain electrode comprises a first electrode electrically connected with a power supply and a second electrode electrically connected with a light-emitting unit, the second electrode being electrically connected with the conductive structure;
- and
- the driving thin-film transistor further comprises a fourth insulating layer disposed between the conductive structure and the first source/drain electrode, both the fourth insulating layer and the second insulating layer are provided with a plurality of through holes, the first electrode and the second electrode are connected to the first active layer via the trough holes in the fourth insulating layer and the second insulating layer, and the second electrode is further connected to the conductive structure via the through holes in the fourth insulating layer.
A display panel, comprising an array substrate, wherein the array substrate comprises:
- a base substrate and a driving thin-film transistor disposed on the base substrate, wherein
- the driving thin-film transistor comprises a first gate, a first insulating layer, a first active layer, a second insulating layer, and a first source/drain electrode which are sequentially laminated on the base substrate, a thickness of the first insulating layer being greater than a thickness of the second insulating layer, and the thickness of the first insulating layer being positively correlated with a subthreshold swing of the driving thin-film transistor;
- the driving thin-film transistor further comprises a conductive structure disposed between the second insulating layer and the first source/drain electrode, wherein an orthographic projection of the conductive structure on the base substrate is overlapped with an orthographic projection of the first gate on the base substrate;
- and the first source/drain electrode comprises a first electrode electrically connected with a power supply and a second electrode electrically connected with a light-emitting unit, the second electrode being electrically connected with the conductive structure;
- and
- the driving thin-film transistor further comprises a fourth insulating layer disposed between the conductive structure and the first source/drain electrode, both the fourth insulating layer and the second insulating layer are provided with a plurality of through holes, the first electrode and the second electrode are connected to the first active layer via the trough holes in the fourth insulating layer and the second insulating layer, and the second electrode is further connected to the conductive structure via the through holes in the fourth insulating layer.
Dependencies are inferred from the claim text.