Superlattice structure with stress relaxation layers therein

A superlattice structure, comprising:

• a substrate;
• a first superlattice stack disposed on the substrate, wherein the first superlattice stack comprises:
• a first superlattice layer, a second superlattice layer and a third superlattice layer disposed from bottom to top, wherein the first superlattice layer comprises A pair(s) of a first aluminum gallium nitride layer and a first III-V group material layer, the second superlattice layer comprises B pair(s) of a second aluminum gallium nitride layer and a second III-V group material layer, the third superlattice layer comprises C pair(s) of a third aluminum gallium nitride layer and a third III-V group material layer, A, B, C are positive integers and C>B>A, and wherein a thickness of the first aluminum gallium nitride layer is different from a thickness of the first Ill-V group material layer;
• and
• two stress relaxation layers respectively disposed between the first superlattice layer and the second superlattice layer, and between the second superlattice layer and the third superlattice layer, wherein each of the two stress relaxation layers respectively comprises a III-V group material layer;
• a second superlattice stack disposed on the first superlattice stack, wherein the second superlattice stack comprises a first stack structure and a second stack structure, wherein the second stack structure is stacked on and in direct contact with the first stack structure, the first stack structure and the second stack structure respectively comprise an undoped gallium nitride layer, a carbon-doped gallium nitride layer, an iron-doped gallium nitride layer and a silicon-doped gallium nitride layer disposed in a listed sequence from bottom to top, and wherein the iron-doped gallium nitride layer is in direct contact with the carbon-doped gallium nitride layer and the silicon-doped gallium nitride layer, and the carbon-doped gallium nitride layer is in direct contact with the undoped gallium nitride layer;
• a channel layer disposed on and directly contacting the second superlattice stack;
• an active layer disposed on the channel layer;
• and
• a source electrode and a drain electrode disposed on the active layer.