Ferroelectric field effect transistors based approach for Euclidean distance calculation in neuromorphic hardware
AssigneeUniversity of Cincinnati
InventorsSiddharth Barve, Rashmi Jha
Life of this patent
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Abstract
An apparatus may comprise a synapse comprising a first reconfigurable field-effect transistor; a second reconfigurable field-effect transistor connected in parallel to the first reconfigurable field-effect transistor; an input voltage applied to each of the first reconfigurable field-effect transistor and the second reconfigurable field-effect transistor corresponding to an input attribute associated with an error computation; and a current sensor measures a saturation drain current of the first reconfigurable field-effect transistor and the second reconfigurable field-effect transistor and determines a Euclidean error based on the saturation drain current of the FETs.
Claims20
An apparatus comprising a synapse comprising:
- a first reconfigurable field-effect transistor comprising an n-channel or p-channel ferroelectric field-effect transistor with a first gate voltage being an input voltage or a weight voltage and a first threshold voltage being based on the weight voltage or the input voltage;
- and
- a second reconfigurable field-effect transistor connected in parallel to the first reconfigurable field-effect transistor and comprising an n-channel or p-channel ferroelectric field-effect transistor with a second gate voltage being the weight voltage or the input voltage and a second threshold voltage being based on the input voltage or the weight voltage, wherein
- the input voltage is applied to a gate of at least one of the first reconfigurable field-effect transistor and the second reconfigurable field-effect transistor, the input voltage corresponding to an input attribute associated with an error computation;
- and
- a current sensor measuring a saturation drain current of the first reconfigurable field-effect transistor or the second reconfigurable field-effect transistor, and determining a Euclidean error based on the saturation drain current of the first reconfigurable field-effect transistor or the second reconfigurable field-effect transistor.
A method comprising:
- receiving an input voltage corresponding to an input attribute of a self-organizing feature map;
- applying the input voltage to each synapse of a two-dimensional grid of synapses, each synapse corresponding to a neuron of the self-organizing feature map, and comprising two reconfigurable field-effect transistors, wherein a weight associated with the neuron is stored such that a threshold voltage of at least one of the reconfigurable field-effect transistors is based on the weight;
- determining a best matching neuron based on a saturation drain current of at least one of the reconfigurable field-effect transistors of each synapse;
- and
- updating the threshold voltage of at least one of the reconfigurable field-effect transistors of at least one synapse of the two-dimensional grid of synapses based on the best matching neuron.
Dependencies are inferred from the claim text.