Bit line pre-charge voltage generating circuit in semiconductor memory devices for reducing current consumption

A bit line pre-charge voltage generating circuit in a semiconductor memory device that generates a bit line pre-charge voltage, comprising:

• a reference voltage generating portion that generates a pull-down reference voltage and a pull-up reference voltage, the level of the pull-down reference voltage being higher than that of the pull-up reference voltage;
• a comparing portion that generates a pull-up comparison signal by comparing the level of the bit line pre-charge voltage with that of the pull-up reference voltage, and generates a pull-down comparison signal by comparing the level of the bit line pre-charge voltage with that of the pull-down reference voltage, the pull-up comparison signal being activated as the level of the bit line pre-charge voltage is lower than that of the pull-up reference voltage, and the pull-down comparison signal being activated as the level of the bit line pre-charge voltage is higher than that of the pull-up reference voltage;
• a driving portion that includes a pull-up driving element and a pull-down driving element, the pull-up driving element being formed between a core voltage and the bit line pre-charge voltage, and being driven to increase the level of the bit line pre-charge voltage according to activation of the pull-up control signal, and the pull-down driving element being formed between a ground voltage and the bit line pre-charge voltage, and being driven to decrease the level of the bit line pre-charge voltage according to activation of the pull-down control signal;
• and
• an activation overlap reduction portion that generates the pull-up control signal and the pull-down control signal with receiving the pull-up comparison signal and the pull-down comparison signal, wherein
• the pull-up control signal is activated according to activation of the pull-up comparison signal in a deactivated state of the pull-down comparison signal, and remains in an inactive state despite of the activation of the pull-up comparison signal in case that the pull-down comparison signal is activated, and
• the pull-down control signal is activated according to activation of the pull-down comparison signal in a deactivated state of the pull-up comparison signal, and remains in an inactive state despite of the activation of the pull-down comparison signal in case that the pull-up comparison signal is activated.

A semiconductor memory device, comprising:

• a bit line pre-charge voltage generating circuit that generates a bit line pre-charge voltage, including:
• a reference voltage generating portion that generates a pull-down reference voltage and a pull-up reference voltage, the level of the pull-down reference voltage being higher than that of the pull-up reference voltage;
• a comparing portion that generates a pull-up comparison signal by comparing the level of the bit line pre-charge voltage with that of the pull-up reference voltage, and generates a pull-down comparison signal by comparing the level of the bit line pre-charge voltage with that of the pull-down reference voltage, the pull-up comparison signal being activated as the level of the bit line pre-charge voltage is lower than that of the pull-up reference voltage, and the pull-down comparison signal being activated as the level of the bit line pre-charge voltage is higher than that of the pull-up reference voltage;
• a driving portion that includes a pull-up driving element and a pull-down driving element, the pull-up driving element being formed between a core voltage and the bit line pre-charge voltage, and being driven to increase the level of the bit line pre-charge voltage according to activation of the pull-up control signal, the pull-down driving element being formed between a ground voltage and the bit line pre-charge voltage, and being driven to decrease the level of the bit line pre-charge voltage according to activation of the pull-down control signal, and
• an activation overlap reduction portion that generates the pull-up control signal and the pull-down control signal, wherein
• the pull-up control signal is activated according to activation of the pull-up comparison signal in a deactivated state of the pull-down comparison signal, and
• the pull-down control signal is activated according to activation of the pull-down comparison signal in a deactivated state of the pull-up comparison signal.