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US 12,675,409 B2Granted
Data transfer technique
AssigneeNVIDIA Corporation
InventorsRachit Garg, Sukru Burc Eryilmaz, Michael Andersch, Apoorv Parle, Herbert Hum, Kefeng Duan, Jiang Jiang
Life of this patent
Estimating the term…
Abstract
Apparatuses, systems, and techniques are to transfer data based, at least in part, on a computational graph. In at least one embodiment, a processor causes a compiler to generate instructions to prefetch one or more data values from dynamic random access memory (DRAM) into an in-processor cache based, at least in part, on a computational graph.
Claims20
A system, comprising:
- one or more processors to cause a compiler to identify one or more data dependencies, indicating that one or more data values used by a first software instruction are to be used by a second software instruction, and generate one or more prefetch instructions based on the one or more data dependencies;
- store the one or more prefetch instructions to be accessible by the one or more processors;
- and
- cause the one or more data values to be transferred from a first storage location to a second storage location prior to executing the second software instruction, based at least in part on the one or more prefetch instructions.
1 more element
One or more processors, comprising:
- circuitry to:
- cause a compiler to identify one or more data dependencies, indicating that one or more data values used by a first software instruction are to be used by a second software instruction, and generate one or more prefetch instructions based on the one or more data dependencies;
- store the one or more prefetch instructions to be accessible by the one or more processors;
- and
- cause the one or more data values to be transferred from a first storage location to a second storage location prior to executing the second software instruction, based at least in part on the one or more prefetch instructions.
2 more elements
A method, comprising:
- causing a compiler to identify one or more data dependencies, using a graph indicating memory operations of a first software instruction and a second software instruction, indicating that one or more data values used by the first software instruction are to be used by the second software instruction;
- generating one or more prefetch instructions based on the one or more data dependencies;
- storing the one or more prefetch instructions in memory accessible by one or more processors;
- and
- causing the one or more data values to be transferred from a slower storage location to a faster storage location prior to executing the second software instruction, based at least in part on the one or more prefetch instructions.
2 more elements
Dependencies are inferred from the claim text.