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US 12,672,382 B2Granted
Geiger-mode avalanche photodiode arrays fabricated on silicon-on-insulator substrates
AssigneeMassachusetts Institute of Technology
InventorsKevin Ryu, Joseph S. Ciampi, Brian F. Aull, Kevan Donlon, Renee D. Lambert
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Abstract
Fabrication of avalanche photodiodes on a first wafer for operation in Geiger mode and integration with read-out integrated circuits (ROICs), fabricated on a second wafer, are described. Photodiode arrays are fabricated using a thin epitaxial layer grown on a semiconductor-on-insulator wafer. Chips are diced from the first wafer and bump bonded to chips diced from the second wafer.
Claims19
A method of fabricating a hybridized sensor, the method comprising:
- implanting ions into a silicon layer of a silicon-on-insulator (SOI) wafer to create a passivation layer;
- growing a device layer on the passivation layer;
- forming a sensor array in the device layer;
- forming an oxide layer over the sensor array;
- forming metal contacts through the oxide layer to cathodes of sensors in the sensor array;
- dicing the SOI wafer to form a chip containing the sensor array;
- hybridizing the chip to a read-out integrated circuit (ROIC) using the metal contacts;
- after hybridizing the chip, removing at least a bulk substrate from the SOI wafer to form a planar surface on the insulator of the SOI wafer or on the passivation layer, the planar surface extending across the sensor array;
- and
- after removing at least the bulk substrate, depositing an antireflection coating on or over the planar surface without etching into the chip a distance into or through the device layer prior to depositing the antireflection coating.
7 more elements
A method of fabricating a hybridized sensor, the method comprising:
- implanting ions into a semiconductor layer of a semiconductor-on-insulator (SOI) wafer to create a passivation layer, the SOI wafer comprising the semiconductor layer, a buried oxide layer, and a semiconductor substrate on a side of the buried oxide layer opposite the semiconductor layer;
- epitaxially growing a device layer on the passivation layer;
- forming a sensor comprising a multiplier region in the device layer;
- forming a first metal contact electrically connected to the sensor;
- dicing the SOI wafer into a first chip containing the sensor;
- bump bonding the first chip to a read-out integrated circuit (ROIC) chip by electrically connecting the first metal contact to a second metal contact of the ROIC chip with a bump bond;
- after bump bonding the first chip to the ROIC chip, thinning the semiconductor substrate on the first chip to form a planar surface so that optical radiation can enter the sensor from a surface of the sensor facing the buried oxide layer, wherein the planar surface extends across the sensor and is located on the insulator layer of the SOI wafer or on the passivation layer;
- and
- after thinning the semiconductor substrate, depositing an antireflection coating on or over the planar surface without etching into the first chip a distance into or through the device layer prior to depositing the antireflection coating.
6 more elements
A method of fabricating a hybridized sensor array, the method comprising:
- implanting ions into a semiconductor layer of a semiconductor-on-insulator (SOI) wafer to create a passivation layer, the SOI wafer comprising the semiconductor layer, a buried oxide layer, and a semiconductor substrate on a side of the buried oxide layer opposite the semiconductor layer;
- epitaxially growing a device layer on the passivation layer;
- forming sensors in at least one array in the device layer wherein each sensor in the at least one array comprises a multiplier region;
- forming first metal contacts electrically connected to the sensors in the at least one array;
- dicing the SOI wafer into a first chip containing an array of sensors of the at least one array;
- bump bonding the first chip to a read-out integrated circuit (ROIC) chip by electrically connecting the first metal contacts to second metal contacts of the ROIC chip with a plurality of bump bonds;
- after bump bonding the first chip, thinning the semiconductor substrate on the first chip to form a planar surface so that optical radiation can enter the array of sensors from a surface of the array of sensors facing the buried oxide layer, wherein the planar surface extends across the array of sensors;
- and
- after forming the planar surface by thinning the semiconductor substrate, depositing an antireflection coating on or over the planar surface.
6 more elements
Dependencies are inferred from the claim text.