Avalanche photodiode array

An avalanche photodiode array, comprising:

• a semiconductor substrate having a first surface and a second surface facing each other and including a semiconductor region of a first conductivity type, the semiconductor region being provided on the first surface side,
• wherein the semiconductor substrate has a plurality of avalanche photodiodes arranged along the first surface,
• the plurality of avalanche photodiodes include:
• a first semiconductor layer of the first conductivity type, the first semiconductor layer being provided closer to the second surface than the semiconductor region;
• a plurality of second semiconductor layers of a second conductivity type, the second semiconductor layers being arranged along the first surface and each surrounded by the semiconductor region when viewed in a direction perpendicular to the first surface;
• and
• a multiplication layer provided within the semiconductor region and provided between the plurality of second semiconductor layers and the first semiconductor layer in the direction perpendicular to the first surface,
• when viewed in the direction perpendicular to the first surface, the plurality of second semiconductor layers and the multiplication layer are provided within a range where the first semiconductor layer is located,
• the multiplication layer includes a third semiconductor layer of the second conductivity type and a fourth semiconductor layer of the first conductivity type, the third semiconductor layer and the fourth semiconductor layer facing each other,
• the third semiconductor layer is provided closer to the first surface than the fourth semiconductor layer,
• each of the third semiconductor layer and the fourth semiconductor layer is continuously provided so as to overlap the plurality of second semiconductor layers when viewed in the direction perpendicular to the first surface,
• when viewed in the direction perpendicular to the first surface, an edge of each of the second semiconductor layers is covered by a junction termination extension region, and
• the junction termination extension region covering each of the second semiconductor layers is a semiconductor region of the second conductivity type having an impurity concentration lower than an impurity concentration of the second semiconductor layer.