Method to suppress base poly linkup overgrowth into the emitter cavity during silicon germanium selective epitaxy growth

A method of forming a semiconductor device, comprising:

• forming a base spacer layer over a collector of a heterojunction bipolar transistor;
• forming a polycrystalline extrinsic base layer including silicon over the base spacer layer;
• exposing the base spacer layer in an emitter window;
• forming a dielectric emitter spacer on sidewalls of the extrinsic base layer in the emitter window, the emitter spacer extending to the base spacer layer;
• removing at least a portion of the base spacer layer, exposing the collector under the emitter window, and exposing portions of lower surfaces of the extrinsic base layer adjacent to the emitter spacer;
• and
• concurrently forming a monocrystalline base layer over the collector and forming a polycrystalline base link contacting the extrinsic base layer adjacent to the emitter spacer;
• wherein:
• the monocrystalline base layer includes silicon-germanium;
• the monocrystalline base layer extends laterally past the emitter spacer to under the extrinsic base layer;
• the base link contacts the monocrystalline base layer;
• the base link laterally abuts the emitter spacer opposite from the emitter window;
• and
• a sum of a spacer extrinsic base vertical offset, between a bottom of the emitter spacer and a bottom surface of the extrinsic base layer adjacent to the emitter spacer, and a bottom width of the emitter spacer, is greater than a monocrystalline base thickness of the monocrystalline base layer.