Processing method, asynchronous circuit, and logic circuit
AssigneeSony Semiconductor Solutions Corporation
InventorsToshihiko Katou, Tadaaki Tanimoto
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AssigneeSony Semiconductor Solutions Corporation
InventorsToshihiko Katou, Tadaaki Tanimoto
Estimating the term…
A processing method according to an embodiment of the present disclosure includes: causing a computer to perform first processing for identifying one or a plurality of flip-flop circuits each forming a self-feedback loop from among a plurality of flip-flop circuits in a synchronous circuit, deleting a feedback path in the self-feedback loop, identifying two or more flip-flop circuits forming strongly coupled components from among the one or plurality of flip-flop circuits, and replacing the two or more flip-flop circuits forming the strongly coupled components with one dummy flip-flop circuit; and causing the computer to perform second processing for identifying first one or more flip-flop circuits coupled to input side of a combinational circuit and second one or more flip-flop circuits coupled to output side of the combinational circuit.
A processing method comprising:
Dependencies are inferred from the claim text.