Application programming interface to indicate performance of barrier instruction
AssigneeNVIDIA Corporation
InventorsZe Long, Kyrylo Perelygin, Harold Carter Edwards, Gokul Ramaswamy Hirisave Chandra Shekhara, Jaydeep Marathe, Ronny Meir Krashinsky, Girish Bhaskarrao Bharambe
Life of this patent
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Abstract
Apparatuses, systems, and techniques to execute CUDA programs. In at least one embodiment, an application programming interface is performed to indicate whether one or more threads within two or more blocks of threads have performed a barrier instruction.
Claims36
One or more processors, comprising:
- circuitry to, in response to a call to an application programming interface (API), indicate whether one or more threads within two or more blocks of threads have performed a barrier instruction to prevent performance of one or more other instructions until performance of barrier instructions by threads of each of the two or more blocks of threads.
A computer-implemented method comprising:
- in response to a call to an application programming interface (API), indicating whether one or more threads within two or more blocks of threads have performed a barrier instruction to prevent performance of one or more other instructions until performance of barrier instructions by threads of each of the two or more blocks of threads.
A computer system comprising:
- one or more processors and at least one memory storing executable instructions that, when executed by the one or more processors, are to in response to a call to an application programming interface (API), indicate whether one or more threads within two or more blocks of threads have performed a barrier instruction to prevent performance of one or more other instructions until performance of barrier instructions by at least one thread of each of the two or more blocks of threads.
A non-transitory machine-readable medium having stored thereon a set of instructions, that when performed by one or more processors, are to in response to a call to an application programming interface (API), indicate whether one or more threads within two or more blocks of threads have performed a barrier instruction to prevent performance of one or more other instructions until performance of barrier instructions by threads of each of the two or more blocks of threads.
Dependencies are inferred from the claim text.