Designs of thermal insulation for micro-ring resonator (MRR) in on-cavity pic (OCPIC) to achieve effective thermal tuning
AssigneeIntel Corporation
InventorsChia-Pin Chiu, Kaveh Hosseini, Omkar Karhade
Life of this patent
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Abstract
Embodiments disclosed herein include optoelectronic systems and methods of forming such systems. In an embodiment, an optoelectronic system comprises a first substrate, a second substrate over the first substrate, and a micro-ring resonator (MRR) over the second substrate. In an embodiment, a heater is integrated into the MRR, a cladding is over the MRR, and an opening is through the first substrate and the second substrate to expose a bottom surface of the MRR.
Claims18
An optoelectronic system, comprising:
- a first substrate;
- a second substrate over the first substrate;
- a micro-ring resonator (MRR) over the second substrate, wherein the MRR comprises an N-doped layer, a P-doped layer over the N-doped layer, and an N-doped region in the P-doped layer;
- a heater integrated into the MRR;
- wherein the heater is between the N-doped region and the P-doped region;
- a cladding over the MRR;
- and
- an opening through the first substrate and the second substrate to expose a bottom surface of the MRR.
A method of forming an optoelectronic system, comprising:
- forming a micro-ring resonator (MRR) with a heater on a substrate, wherein the substrate is a silicon on insulator (SOI) substrate with a silicon substrate and an oxide layer over the silicon substrate, wherein a cladding is provided over and around the MRR, wherein the MRR comprises an N-doped layer, a P-doped layer over the N-doped layer, and an N-doped region in the P-doped layer, and wherein the heater is between the N-doped region and the P-doped region;
- applying a mask to a bottom surface of the silicon substrate, wherein an opening of the mask is aligned with the MRR;
- and
- etching through the silicon substrate and the oxide layer to expose a bottom surface of the MRR.
An optoelectronic system, comprising:
- a package substrate;
- a photonics integrated circuit (PIC) coupled to the package substrate, wherein the PIC comprises:
- a first substrate;
- a second substrate over the first substrate;
- a micro-ring resonator (MRR) over the second substrate, wherein the MRR comprises an N-doped layer, a P-doped layer over the N-doped layer, and an N-doped region in the P-doped layer;
- a heater integrated into the MRR;
- wherein the heater is between the N-doped region and the P-doped region;
- a cladding over the MRR;
- and
- an opening through the first substrate and the second substrate to expose a bottom surface of the MRR;
- and
- an electronic integrated circuit (EIC) coupled to the PIC.
Dependencies are inferred from the claim text.