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US 12,669,531 B2Granted
Integrated sensor and method of timing monitoring in an integrated sensor
AssigneeSTMicroelectronics S.r.l.
InventorMatteo Quartiroli
Life of this patent
Estimating the term…
Abstract
The integrated sensor has a clock which provides a clock signal having a clock frequency; a digital detector which detects a power grid signal and generates a reference digital signal indicative of the power grid signal and having a sample rate which is a function of the clock frequency; and a timing monitoring stage which receives the reference digital signal and a nominal signal indicative of a nominal timing of the reference digital signal. The timing monitoring stage also compares the reference digital signal with the nominal signal and, in response, provides an error signal indicative of a timing error between the reference digital signal and the nominal signal.
Claims20
An integrated sensor, comprising:
- a clock configured to provide a clock signal having a clock frequency;
- a digital detector configured to:
- detect a power grid signal;
- and
- generate a reference digital signal indicative of the power grid signal and having a sample rate which is a function of the clock frequency;
- and
- a timing monitor configured to:
- receive the reference digital signal and a nominal signal indicative of a nominal timing of the reference digital signal in order to compare the reference digital signal with the nominal signal, the nominal signal being indicative of a nominal digital frequency of the reference digital signal, the nominal digital frequency being a function of a nominal data rate of the reference digital signal and of a grid frequency of the power grid signal;
- and
- in response to the comparison, provide an error signal indicative of a timing error between the reference digital signal and the nominal signal,
- the timing monitor including an estimator configured to determine, from the reference digital signal, a timing parameter indicative of an effective digital frequency of the reference digital signal, the effective digital frequency being a function of an effective data rate of the reference digital signal and of the grid frequency of the power grid signal, the timing error being indicative of a difference between the effective digital frequency and the nominal digital frequency.
8 more elements
A method, comprising:
- generating, by a clock, a clock signal having a clock frequency;
- detecting, by a digital detector, a power grid signal;
- generating, by the digital detector, a reference digital signal indicative of the detected power grid signal and having a sample rate which is a function of the clock frequency;
- comparing, by a timing monitor, the reference digital signal with a nominal signal indicative of a nominal timing of the reference digital signal, the nominal signal is indicative of a nominal digital frequency of the reference digital signal, the nominal digital frequency being a function of a nominal data rate of the reference digital signal and of a grid frequency of the power grid signal;
- and
- providing, by the timing monitor, an error signal indicative of a timing error between the reference digital signal and the nominal signal, in response to the comparison between the reference digital signal and the nominal signal,
- comparing the reference digital signal with the nominal signal includes determining, from the reference digital signal, a timing parameter indicative of an effective digital frequency of the reference digital signal, the effective digital frequency being a function of an effective data rate of the reference digital signal and of the grid frequency of the power grid signal, the timing error being indicative of a difference between the effective digital frequency and the nominal digital frequency.
4 more elements
A device, comprising:
- a clock configured to generate a clock signal having a clock frequency;
- a reference detector configured to detect electrostatic charge variation of a power grid signal, and generate a reference digital signal based on the electrostatic charge variation and the clock signal;
- and
- a rate monitor configured to:
- receive a nominal value signal indicative of a nominal digital frequency of the reference digital signal;
- determine an effective digital frequency of the reference digital signal;
- determine a difference between the effective digital frequency and the nominal digital frequency;
- and
- change the clock frequency based on the difference between the effective digital frequency and the nominal digital frequency.
6 more elements
An integrated sensor, comprising:
- a clock configured to provide a clock signal having a clock frequency;
- a first digital detector configured to:
- detect a power grid signal;
- and
- generate a reference digital signal indicative of the power grid signal and having a sample rate which is a function of the clock frequency;
- and
- a timing monitor configured to:
- receive the reference digital signal and a nominal signal indicative of a nominal timing of the reference digital signal in order to compare the reference digital signal with the nominal signal;
- and
- in response to the comparison, provide an error signal indicative of a timing error between the reference digital signal and the nominal signal,
- the timing monitor including a trimming module configured to:
- receive the error signal;
- and
- provide a trimming signal configured to compensate for the timing error;
- and
- a second digital detector configured to:
- detect a physical quantity;
- provide an output digital signal indicative of the detected physical quantity and having a sample rate which is a function of the clock frequency;
- receive the trimming signal;
- and
- in response to the trimming signal being received, modify the sample rate of the output digital signal.
18 more elements
An integrated sensor, comprising:
- a clock configured to provide a clock signal having a clock frequency;
- a digital detector configured to:
- detect a power grid signal;
- and
- generate a reference digital signal indicative of the power grid signal and having a sample rate which is a function of the clock frequency;
- and
- a timing monitor configured to:
- receive the reference digital signal and a nominal signal indicative of a nominal timing of the reference digital signal in order to compare the reference digital signal with the nominal signal;
- and
- in response to the comparison, provide an error signal indicative of a timing error between the reference digital signal and the nominal signal,
- the timing monitor including a trimming module configured to:
- receive the error signal;
- and
- provide a trimming signal configured to compensate for the timing error,
- the clock is configured to:
- receive the trimming signal;
- and
- in response to the trimming signal being received, modify the clock frequency of the clock signal.
15 more elements
Dependencies are inferred from the claim text.