Semiconductor circuit arrangement and method for a semiconductor circuit arrangement
AssigneeInfineon Technologies AG
InventorUdo Ausserlechner
Life of this patent
Estimating the term…
Loading patent…
AssigneeInfineon Technologies AG
InventorUdo Ausserlechner
Estimating the term…
A semiconductor circuit arrangement includes a substrate, at least two first stress-sensitive elements in a first region of the substrate and at least two second stress-sensitive elements in a second region of the substrate. The first stress-sensitive elements each have an electrical characteristic which is dependent on a first component and a second component of a mechanical stress tensor in the first region. The second stress-sensitive elements each have an electrical characteristic which is dependent on a first component and a second component of a mechanical stress tensor in the second region. The semiconductor circuit arrangement includes a measuring circuit configured, based on the respective electrical characteristics of the first stress-sensitive elements and of the second stress-sensitive elements, to determine a stress difference between the first components in the first and second regions and a stress difference between the second components in the first and second regions.
A semiconductor circuit arrangement, comprising:
A semiconductor circuit arrangement, comprising:
A method for a semiconductor circuit arrangement comprising:
Dependencies are inferred from the claim text.