Flat panel detector and imaging system

A flat panel detector, comprising a plurality of pixel units arranged in array, wherein the plurality of pixel units comprise:

• a plurality of photosensitive pixel units;
• and
• a plurality of alignment pixel units comprising a plurality of first alignment pixel units each having a first fixed grayscale and a plurality of second alignment pixel units each having a second fixed grayscale, wherein
• each of the plurality of first alignment pixel units comprises a photoelectric sensor, and the photoelectric sensor comprises a first electrode;
• a photoelectric sensing layer, stacked with the first electrode and configured to provide an electrical signal corresponding to the first fixed grayscale of the first alignment pixel unit corresponding to the photoelectric sensor;
• and a second electrode, located at a side of the photoelectric sensing layer away from the first electrode,
• each of the plurality of first alignment pixel units further comprises a transistor, wherein the transistor comprises a gate electrode, a first electrode and a second electrode,
• the flat panel detector further comprises signal lines, and the signal lines comprise:
• a bias voltage line, electrically connected with the photoelectric sensor and configured to provide a bias voltage;
• a gate line, configured to provide a gate driving signal to the transistor;
• and
• a data line, intersecting with the gate line to define the plurality of pixel units arranged in array, wherein
• the first electrode of the transistor is disconnected from the first electrode of the photoelectric sensor, and
• for each first alignment pixel unit of at least part of the plurality of first alignment pixel units, the transistor is electrically connected with the signal line so that the data line can read the electrical signal generated by the photoelectric sensing layer.