Method of via filling
AssigneeTokyo Electron Limited
InventorsRyota Yonezawa, Kai-Hung Yu, Ying Trickett, Hidenao Suzuki
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Abstract
A method of processing a substrate includes exposing the substrate to a boron-containing precursor to adsorb over the substrate, where the substrate includes a dielectric layer formed over a conductive layer, and the conductive layer is exposed at a bottom of a recess formed in the dielectric layer. The method includes exposing the adsorbed boron-containing precursor to a plasma and filling the recess with a conductive fill material bottom up by a vapor deposition process, where a vertical deposition rate of the conductive fill material is greater than a lateral deposition rate of the conductive fill material.
Claims20
A method of processing a substrate, the method comprising:
- exposing the substrate to a boron-containing precursor to adsorb over the substrate, the substrate comprising a dielectric layer formed over a conductive layer, the conductive layer being exposed at a bottom of a recess formed in the dielectric layer,
- exposing the adsorbed boron-containing precursor to a plasma;
- and
- filling the recess with a conductive fill material bottom up by a vapor deposition process, wherein a vertical deposition rate of the conductive fill material is greater than a lateral deposition rate of the conductive fill material.
A method of processing a substrate, the method comprising:
- exposing the substrate to BCl3 to adsorb over a surface of the substrate, the surface comprising a dielectric layer and a conductive layer;
- exposing the adsorbed BCl3 to a plasma comprising argon and hydrogen, the exposing to the plasma incorporating boron into the dielectric layer;
- and
- depositing a metal over the surface, wherein a deposition rate of the metal is greater over the conductive layer than over the dielectric layer.
A method of forming a metal interconnect for a semiconductor device, the method comprising:
- exposing a substrate comprising a via to a boron-containing precursor to adsorb over sidewalls of the via, the via having a critical dimension of 20 nm or less, a conductive material being exposed at a bottom of the via;
- exposing the substrate to a plasma to induce boron doping to the sidewalls;
- and
- filling the via with ruthenium (Ru) by a vapor deposition process, the Ru being deposited preferentially from the bottom of the via than from the sidewalls.
Dependencies are inferred from the claim text.