Semiconductor device with integrated junction field effect transistor and associated manufacturing method
AssigneeMonolithic Power Systems, Inc.
InventorsVipindas Pala, Sauvik Chowdhury
Life of this patent
Estimating the term…
Abstract
A semiconductor device includes a first source region, a first sidewall body region, a gate region, a second source region and a link region formed in a substrate of a first conductivity type. The first source region and the second source region may be of the first conductivity type while the first sidewall body region and the link region may be of a second conductivity type opposite to the first conductivity type. The link region and the gate region are respectively disposed at a first side and a second side of the first source region. The first sidewall body region may be disposed below or underneath the first source region.
Claims25
A transistor cell, comprising:
- a metal oxide semiconductor effect transistor (“MOSFET”) cell formed in a substrate;
- and
- a junction field effect transistor (“JFET”) cell corresponding to the MOSFET cell and formed in the substrate;
- wherein
- the MOSFET cell includes a drain region of a first conductivity type disposed adjacent a first surface of the substrate, a first source region of the first conductivity type disposed adjacent a second surface opposite to the first surface of the substrate, a first sidewall body region of a second conductivity type opposite to the first conductivity type and disposed below or underneath the first source region, and a gate region disposed next to or in adjoining neighbor to the first source region;
- and wherein
- the JFET cell includes a second source region of the first conductivity type disposed below or underneath the first sidewall body region, and a link region of the second conductivity type disposed at a first side of the first source region and spatially opposite to the gate region.
Dependencies are inferred from the claim text.