US 12,666,695 B2 · Methods of improving PMOS transistor performance

Abstract

Methods of manufacturing electronic devices, such as transistors (negative metal-oxide-semiconductor (NMOS) transistors (e.g., an N-metal stack) and positive metal-oxide-semiconductor (PMOS) transistors (e.g., a P-metal stack)) are described. Embodiments of the disclosure are directed to methods of improving PMOS transistor performance by inhibiting N-metal layer growth. The present disclosure provides two types of processes to reduce or inhibit N-metal layer growth. The disclosure provides methods which include forming a self-assembled monolayer (SAM) on the metal surface (e.g., titanium nitride (TiN)) of the PMOS, and methods which include forming a silicon-containing layer such as silicon oxide (SiOx) on the TiN surface. These two types of processes significantly reduce or inhibit the subsequent growth of an N-metal layer, such as titanium aluminum carbide (TiAlC), on the TiN surface of the PMOS.

Claims20

Dependent claims

A method of manufacturing an electronic device, the method comprising:

forming a P-metal stack and an N-metal stack on a semiconductor substrate, each of the P-metal stack and the N-metal stack formed on a top surface of a channel located between a source and a drain on the semiconductor substrate, forming each of the P-metal stack and the N-metal stack comprising:
depositing an interfacial layer on the top surface of the channel,
depositing a high-κ dielectric layer on the interfacial layer, and
depositing a P-metal layer on the high-κ dielectric layer on the P-metal stack;
exposing the semiconductor substrate to a blocking compound to selectively deposit a blocking layer on the P-metal layer;
and
selectively depositing an N-metal layer on the N-metal stack.

4 more elements

Dependencies are inferred from the claim text.

Methods of improving PMOS transistor performance

Life of this patent

Methods of improving PMOS transistor performance

Life of this patent

Abstract

Claims20