Low resistance metal to semiconductor contacts for integrated NMOS and PMOS transistors
AssigneeIntel Corporation
InventorsChristopher J. Jezewski, Matthew V. Metz
Life of this patent
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Abstract
Complementary metal-oxide-semiconductor (CMOS) devices and methods related to selective metal contacts to n-type and p-type source and drain semiconductors are discussed. A p-type metal is deposited on n- and p-type source/drains. The p-type metal is selectively removed from the n-type source/drains but remains on dielectric materials adjacent the n-type source/drains. An n-type metal is deposited on the n-type source/drains while the remaining p-type metal seals the dielectric materials to protect the n-type metal from contamination. The n-type metal is then sealed using another p-type metal. A contact fill material contacts the resultant source and drain contact stacks.
Claims21
An apparatus, comprising:
- a first transistor comprising:
- a first source or drain region comprising an n-type semiconductor material;
- a dielectric material comprising a sidewall adjacent the first source or drain region;
- a first metal layer comprising a first p-type metal on the sidewall;
- a second metal layer comprising an n-type metal, wherein the second metal layer has a first portion discontinuous from a second portion, wherein the first portion is on a top surface of the first source or drain region and the second portion is on the first metal layer;
- a third metal layer comprising a second p-type metal or the first p-type metal on the second metal layer;
- and
- a first metal fill of a first metal on the third metal layer, and in a region laterally adjacent the sidewall;
- and
- a second transistor comprising:
- a second source or drain region comprising a p-type semiconductor material;
- a fourth metal layer comprising the first p-type metal on a top surface of the second source or drain region;
- and
- a second metal fill of the first metal on the fourth metal layer.
An apparatus, comprising:
- a first transistor comprising:
- an n-type semiconductor material source or drain;
- a dielectric material comprising a sidewall adjacent the n-type semiconductor material source or drain;
- a first p-type metal on the sidewall;
- an n-type metal, wherein the n-type metal has a first portion discontinuous from a second portion, wherein the first portion is on a top surface of the n-type semiconductor material source or drain and the second portion is on the first p-type metal;
- a second p-type metal on the n-type metal;
- and
- a metal fill on the second p-type metal, and in a region laterally adjacent the sidewall;
- and
- a second transistor comprising:
- a p-type semiconductor material source or drain;
- the first p-type metal on a top surface of the p-type semiconductor material source or drain;
- and
- the metal fill on the first p-type metal.
Dependencies are inferred from the claim text.