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US 12,666,631 B2Granted
Decoupling FinFET capacitors
AssigneeTaiwan Semiconductor Manufacturing Company, Ltd.
InventorChung-Hui Chen
Life of this patent
Estimating the term…
Abstract
A semiconductor device including field-effect transistors (finFETs) and fin capacitors are formed on a silicon substrate. The fin capacitors include silicon fins, one or more electrical conductors between the silicon fins, and insulating material between the silicon fins and the one or more electrical conductors. The fin capacitors may also include insulating material between the one or more electrical conductors and underlying semiconductor material.
Claims20
A semiconductor device, comprising:
- a substrate having a first semiconductor fin having a length extending in a first direction and an adjacent second semiconductor fin having a length extending in the first direction with an isolation feature between a bottom region of the first semiconductor fin and a bottom region of the second semiconductor fin, wherein the length of each of the first semiconductor fin and the second semiconductor fin are greater than a width of each of the first semiconductor fin and the second semiconductor fin, wherein the width extends in a second direction perpendicular to the first direction;
- a first electrical conductor having a length extending in the first direction and disposed over the isolation feature and between the first semiconductor fin and the second semiconductor fin, and wherein the length of the first electrical conductor is greater than a width of the first electrical conductor, the width of the first electrical conductor extends in the second direction;
- and
- a dielectric layer between the first semiconductor fin and the second semiconductor fin and over the isolation feature, wherein the dielectric layer is disposed on at least one surface of the first electrical conductor, wherein the bottom surface of the first electrical conductor is coplanar with a top surface of the first semiconductor fin.
1 more element
A capacitor device, comprising:
- a substrate having a first semiconductor fin having a length extending in a first direction and an adjacent second semiconductor fin having a length extending in the first direction with a shallow trench isolation (STI) feature between a bottom region of the first semiconductor fin and a bottom region of the second semiconductor fin, wherein the length of each of the first semiconductor fin and the second semiconductor fin are greater than a width of each of the first semiconductor fin and the second semiconductor fin, wherein the width extends in a second direction perpendicular to the first direction;
- a first electrical conductor having a length extending in the first direction and disposed over the STI feature and between the first semiconductor fin and the second semiconductor fin, and wherein the length of the first electrical conductor is greater than a width of the first electrical conductor, the width of the first electrical conductor extends in the second direction;
- a first dielectric layer on the STI feature and surrounding the first electrical conductor;
- and
- a second electrical conductor on the first dielectric layer and having a length extending in the first direction, and wherein the length of the second electrical conductor is greater than a width of the second electrical conductor, the width of the second electrical conductor extends in the second direction, wherein the first electrical conductor and the second electrical conductor are connected to a same electrode.
2 more elements
A semiconductor device, the device comprising:
- a substrate having a first active region and a second active region with a shallow trench isolation (STI) feature between a bottom region of the first active region and a bottom region of the second active region, wherein the first active region and the adjacent second active region have a length measured in a first direction from a top view and a width in a second direction from the top view, the length greater than the width;
- a dielectric layer on an upper surface of the STI feature and between the first active region and the second active region and over the STI feature;
- an electrical conductor over the STI feature and the dielectric layer and between the first active region and the second active region, wherein the electrical conductor has a length measured in the first direction from the top view and a width in the second direction from the top view, wherein the length of the electrical conductor is greater than the width of the electrical conductor;
- and
- wherein the dielectric layer extends from a sidewall of the first active region to a surface of the electrical conductor, and the sidewall of the first active region extends in the first direction from the top view, wherein the surface of the electrical conductor extends in the first direction.
2 more elements
Dependencies are inferred from the claim text.