Memory devices having vertical transistors and fabricating methods thereof
AssigneeYangtze Memory Technologies Co., Ltd.
InventorsHe Chen, Ziqun Hua, Yanhong Wang, Wei Liu
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Abstract
A three-dimensional (3D) memory device and a fabricating method thereof are disclosed. The 3D memory device can comprise an array of memory cells. Each memory cell can comprise a capacitor and a vertical transistor. The vertical transistor can comprise a semiconductor body extending in a vertical direction and in contact with the capacitor, and a three-sided gate structure surrounding the semiconductor body from three lateral directions. The 3D memory device can further comprise a memory controller configured to control the array of memory cells.
Claims19
A semiconductor device, comprising:
- an array of memory cells, each memory cell comprising:
- a capacitor;
- and
- a vertical transistor comprising:
- a semiconductor body extending in a vertical direction, comprising a curved sidewall and a flat sidewall, and in contact with the capacitor, and
- a three-sided gate structure surrounding the semiconductor body from three lateral directions.
A memory system, comprising:
- an array of memory cells, each memory cell comprising:
- a capacitor;
- and
- a vertical transistor comprising:
- a semiconductor body extending in a vertical direction and in contact with the capacitor, and
- a three-sided gate structure partially surrounding the semiconductor body from three lateral directions including at least two opposite lateral directions, without enclosing a fourth lateral direction,
- wherein the three-sided gate structure surrounds a curved sidewall of the semiconductor body;
- and
- a memory controller configured to control the array of memory cells.
A semiconductor device, comprising:
- an array of memory cells, each memory cell comprising:
- a capacitor;
- and
- a vertical transistor comprising:
- a semiconductor body extending in a vertical direction and in contact with the capacitor, and
- a three-sided gate structure partially surrounding the semiconductor body from three lateral directions, without enclosing a fourth lateral direction,
- wherein the three-sided gate structure surrounds a curved sidewall of the semiconductor body.
Dependencies are inferred from the claim text.