Communication method and system, device, and computer-readable storage medium

A device, comprising:

• a processor;
• and
• a memory, wherein the processor is configured to execute code stored in the memory, and executing the code causes the device to perform the following:
• constructing multi-bit target data into at least one target data packet based on a preset format, wherein each target data packet comprises at least one bit of the multi-bit target data and multi-bit identification data, and the multi-bit identification data in each target data packet of the at least one target data packet indicates a quantity and locations of target data in a corresponding target data packet;
• packing each bit of data in the at least one target data packet in a manner that different data has different signal waveforms after being packed, to obtain packed data;
• and
• sequentially sending each bit of the packed data to a second device through a single target signal line, wherein the single target signal line connects an input/output port of the device to an input/output port of the second device and excludes transmission of a clock signal.

A system, comprising:

• a first device;
• and
• a second device;
• wherein the first device is configured to:
• construct multi-bit target data into at least one target data packet based on a preset format, wherein each target data packet in the at least one target data packet comprises at least one bit of the multi-bit target data and multi-bit identification data, and the multi-bit identification data in each target data packet indicates a quantity and locations of target data in a corresponding target data packet;
• pack each bit of data in the at least one target data packet in a manner that different data has different signal waveforms after being packed, to obtain packed data;
• and
• sequentially send each bit of the packed data to the second device through a single target signal line, wherein the single target signal line connects an input/output port of the first device to an input/output port of the second device and excludes transmission of a clock signal.