High-speed communication method and device based on duobinary signal
AssigneeKorea Advanced Institute of Science and Technology
InventorsKyeongha Kwon, Jung Hoo Kim
Life of this patent
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Abstract
Proposed is a high-speed communication device based on a duobinary signal. The device may include an output circuit configured to output a duobinary signal. The device may also include a first compensation circuit configured to apply a first equalization (EQ) for amplifying the duobinary signal to a voltage to be transitioned during voltage transition of the duobinary signal. The device may further include a second compensation circuit configured to apply a second EQ for saturating the duobinary signal to a predetermined voltage after the first EQ is applied.
Claims18
A high-speed communication device based on a duobinary signal comprising:
- an output circuit configured to output a duobinary signal;
- a first compensation circuit configured to apply a first equalization (EQ) for amplifying the duobinary signal to a voltage to be transitioned during voltage transition of the duobinary signal;
- a second compensation circuit configured to apply a second EQ for saturating the duobinary signal to a predetermined voltage after the first EQ is applied;
- a high level voltage source configured to supply a high level voltage to the output circuit, the first compensation circuit, and the second compensation circuit;
- a low level voltage source configured to supply a low level voltage to the output circuit, the first compensation circuit, and the second compensation circuit;
- and
- a middle level voltage source configured to supply a middle level voltage to the output circuit, the first compensation circuit, and the second compensation circuit,
- wherein the first compensation circuit includes:
- a (1-1)-th compensation circuit configured to apply a (1-1)-th EQ for amplifying the duobinary signal to a voltage to be transitioned during transition of the duobinary signal to the high level voltage or the low level voltage;
- and
- a (1-3)-th compensation circuit configured to apply a (1-3)-th EQ for amplifying the duobinary signal to a voltage to be transitioned during transition of the duobinary signal to the middle level voltage.
Dependencies are inferred from the claim text.