System and method for low density parity check (LDPC) code with 5/6 code rate
AssigneeAvago Technologies International Sales Pte. Limited
InventorsRethnakaran Pulikkoonattu, Andrew Blanksby, Vinko Erceg
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Abstract
In some implementations, an apparatus may include a transmitter and one or more processors. The one or more processors may be configured to identify, according to a code rate of 5/6 and a code block size of 3888 bits, a first binary parity check matrix for a quasi-cyclic-low-density parity-check (QC-LDPC) code. The first binary parity check matrix may correspond to a first exponent matrix having 96 values. The one or more processors may be configured to encode data using the first binary parity check matrix. The one or more processors may be configured to transmit the encoded data.
Claims20
A method for increasing a gain in a signal-to-noise (SNR) of a channel compared with encoding data using a quasi-cyclic-low-density parity-check (QC-LDPC) code corresponding to a code block size smaller than 3888 bits, comprising:
- identifying, by baseband circuitry of a first device according to a code rate of 5/6 and a code block size of 3888 bits, a first binary parity check matrix for a QC-LDPC code, the first binary parity check matrix corresponding to a first exponent matrix having 96 values;
- encoding, by an encoder of the baseband circuitry of the first device, data using the first binary parity check matrix;
- and
- transmitting, by a transmitter of the first device, the encoded data over the channel.
An apparatus for increasing a gain in a signal-to-noise (SNR) of a channel compared with encoding data using a quasi-cyclic-low-density parity-check (QC-LDPC) code corresponding to a code block size smaller than 3888 bits, the apparatus comprising:
- a transmitter and baseband circuitry, wherein the baseband circuitry is configured to:
- identify, according to a code rate of 5/6 and a code block size of 3888 bits, a first binary parity check matrix for a QC-LDPC code, the first binary parity check matrix corresponding to a first exponent matrix having 96 values;
- encode, by an encoder of the baseband circuitry, data using the first binary parity check matrix;
- and
- transmit, by the transmitter, the encoded data over the channel.
An apparatus for increasing a gain in a signal-to-noise (SNR) of the channel compared with encoding data using a quasi-cyclic-low-density parity-check (QC-LDPC) code corresponding to a code block size smaller than 3888 bits, the apparatus comprising:
- a receiver configured to receive encoded data over the channel, wherein the encoded data is encoded using a first binary parity check matrix for a QC-LDPC code according to a code rate of 5/6 and a code block size of 3888 bits;
- and
- baseband circuitry configured to:
- identify, according to the code rate of 5/6 and the code block size of 3888 bits, the first binary parity check matrix corresponding to a first exponent matrix having 96 values;
- and
- decode the received encoded data using the first binary parity check matrix.
Dependencies are inferred from the claim text.