Digitally trimmable input current cancellation circuit for analog-to-digital converter

An integrated circuit comprising:

• a first voltage input terminal;
• a second voltage input terminal;
• an analog-to-digital converter circuit that senses a voltage between the first voltage input terminal and the second voltage input terminal, and that outputs a multi-bit digital output value indicative of the voltage, wherein the analog-to-digital converter circuit has a first voltage input node and a second voltage input node;
• an input current cancellation circuit that is coupled to the first and second voltage input nodes of the analog-to-digital converter circuit, wherein the input current cancellation circuit has a gain that is at least in part determined by a multi-bit digital gain trim value, wherein the gain of the input current cancellation circuit is at least in part determined by a multi-bit compensation voltage value;
• one or more first digital registers that store the multi-bit digital gain trim value;
• one or more second digital registers that store the multi-bit compensation voltage value;
• a plurality of digital interface terminals;
• a digital interface circuit usable to change the multi-bit digital gain trim value stored in the one or more first digital registers, and usable to change the multi-bit compensation voltage value stored in the one or more second digital registers;
• and
• a compensation voltage generator circuit that outputs a compensation voltage that is supplied to the input current cancellation circuit, wherein the magnitude of the compensation voltage as supplied to the input current cancellation circuit is trimmable by changing the multi-bit compensation voltage value stored in the one or more second digital registers.

A method comprising:

• (a) storing a multi-bit digital gain trim value in one or more first digital registers on an integrated circuit;
• (b) storing a multi-bit compensation voltage value in one or more second digital registers on the integrated circuit;
• (c) using an analog-to-digital converter of the integrated circuit to sense a voltage between a first voltage input node of the integrated circuit and a second voltage input node of the integrated circuit, and outputting a multi-bit digital output value from the analog-to-digital converter that is indicative of the voltage sensed;
• and
• (d) using an input current cancellation circuit to generate input current cancellation currents and to conduct the input current cancellation currents between the input current cancellation circuit and the first and second voltage input nodes, wherein the input current cancellation circuit has a gain that is a function of both the multi-bit digital gain trim value and the multi-bit compensation voltage value, wherein (a) through (d) are all performed by the integrated circuit.

A method comprising:

• (a) storing a multi-bit digital gain trim value on an integrated circuit;
• (b) storing a multi-bit compensation voltage value on the integrated circuit;
• (c) using an analog-to-digital converter of the integrated circuit to sense a voltage between a first voltage input node of the integrated circuit and a second voltage input node of the integrated circuit, and outputting a multi-bit digital output value from the analog-to-digital converter that is indicative of the voltage sensed;
• and
• (d) using an input current cancellation circuit to generate input current cancellation currents and to conduct the input current cancellation currents between the input current cancellation circuit and the first and second voltage input nodes, wherein the input current cancellation circuit has a gain that is a function of both the multi-bit digital gain trim value and the multi-bit compensation voltage value, wherein (a) through (d) are all performed by the integrated circuit.