Wafer placement table
AssigneeNGK Insulators, Ltd.
InventorsSeiya Inoue, Tatsuya Kuno
Life of this patent
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Abstract
A wafer placement table includes a ceramic substrate having a wafer placement surface on an upper surface thereof and containing an electrode therein; a conductive substrate disposed adjacent to a lower surface of the ceramic substrate, serving also as a plasma generating electrode, and having the same diameter as the ceramic substrate; a support substrate disposed adjacent to a lower surface of the conductive substrate, having a greater diameter than the conductive substrate, and electrically insulated from the conductive substrate; and a mounting flange constituting a part of the support substrate and radially extending out of the conductive substrate.
Claims9
A wafer placement table comprising:
- a ceramic substrate having a wafer placement surface on an upper surface thereof, the ceramic substrate containing an electrode therein;
- a conductive substrate disposed adjacent to a lower surface of the ceramic substrate, having a cooling medium passage or a cooling medium passage groove, serving also as a plasma generating electrode;
- a support substrate disposed adjacent to a lower surface of the conductive substrate, having a greater diameter than the conductive substrate, and electrically insulated from the conductive substrate;
- and
- a mounting flange constituting a part of the support substrate and radially extending out of the conductive substrate.
Dependencies are inferred from the claim text.