Optimization of soft bit windows based on signal and noise characteristics of memory cells

A method, comprising:

• generating, in a device having memory cells, data representative of characteristics of the memory cells;
• determine, by a logic circuit of the device based on the data representative of the characteristics, a first read voltage to read hard bit data from the memory cells;
• and
• determine, by the logic circuit based on the first read voltage, a voltage window between a second read voltage and a third read voltage to read soft bit data from the memory cells.

An apparatus, comprising:

• a processing device;
• and
• a memory device enclosed within an integrated circuit package and connected to the processing device, the memory device having:
• memory cells;
• a read circuit configured to apply a respective read voltage on the memory cells and determine states of the memory cells when the memory cells are subjected to the respective read voltage;
• a logic circuit configured to, in response to a read command from the processing device:
• generate, using the read circuit, data representative of characteristics of the memory cells;
• determine, based on the data representative of the characteristics, a first read voltage;
• generate, using the read circuit, first data of reading the memory cells using the first read voltage;
• and
• determine, based on the first read voltage, a voltage window between a second read voltage and a third read voltage.