Tamper detector based on power network electrical characteristic

A method comprising:

• storing a reference voltage signature of a power distribution network comprising an integrated circuit;
• generating in the integrated circuit a current stimulus waveform by generating frequencies above the Nyquist frequency using images of the fundamental frequency signals from their harmonic content due to their wave shape, and providing the waveform to the power distribution network comprising the integrated circuit;
• sampling the power distribution network with a voltage-to-digital converter in the integrated circuit and estimating a response voltage signature of the power distribution network responsive to the stimulus waveform;
• comparing on the integrated circuit the estimated response voltage signature and the reference voltage signature;
• and
• triggering on the integrated circuit a penalty based on a comparison of the response voltage signature and the reference voltage signature.

An integrated circuit comprising:

• a processor;
• a power distribution network having a reference voltage signature;
• and
• a vector network analyzer, wherein the vector network analyzer comprises:
• a waveform generator circuit to generate a current stimulus waveform by sigma-delta based noise shaping, and provide the waveform to the power distribution network;
• a voltage-to-digital converter circuit to sample a voltage and to estimate a response voltage signature of the power distribution network responsive to the stimulus waveform;
• a comparison circuit to compare the estimated response voltage signature and the reference voltage signature;
• and a tamper detector circuit to trigger a penalty based on a comparison by the comparison circuit of the response voltage signature and the reference voltage signature.

A integrated circuit comprising:

• an integrated circuit comprising:
• a processor;
• a power distribution network having a reference voltage signature;
• and
• a vector network analyzer of the power distribution network, the vector network analyzer in the integrated circuit, wherein the vector network analyzer comprises:
• a waveform generator circuit to generate a current stimulus waveform by generating frequencies above the Nyquist frequency using images of the fundamental frequency signals from their harmonic content due to their wave shape, and provide the waveform to the power distribution network;
• a voltage-to-digital converter circuit to sample voltage at a high frequency and estimate a response voltage signature of the power distribution network responsive to the stimulus waveform;
• and
• a comparison circuit to compare the estimated response voltage signature and the reference voltage signature;
• and
• a tamper detector circuit to trigger a penalty based on a comparison by the comparison circuit of the response voltage signature and the reference voltage signature.