Data encryption suitable for use in systems with processing-in-memory

A data processing system comprising:

• a host processor;
• a memory coupled to said host processor;
• a processor-in-memory coupled to said memory,
• wherein each of said host processor and said processor-in-memory comprises an encryption circuit comprising:
• an iterative block cipher circuit having a counter input for receiving a row index, a key input for receiving a secret key, and an output for providing an encrypted counter value in response to performing a block cipher process using said row index as a counter and said secret key;
• and
• wherein said encryption circuit uses said iterative block cipher circuit to perform an iterative block cipher operation during a time period of a row activation operation to said memory in which said host processor sends an activate command with said row index to said memory, wherein an overhead of said performing the iterative block cipher operation is hidden within said time period.

A method for securely storing data in a memory, comprising:

• generating a memory access request;
• responsive to determining that a memory row of said memory access request is not open:
• opening said memory row in the memory during a row activation operation, wherein said opening comprises sending an activate command with a row index to the memory;
• and
• generating, during a time period of said row activation operation, an encrypted counter value based on using said row index of said memory row as a counter and a secret key, wherein an overhead of said generating the encrypted counter value is hidden within said time period;
• thereafter:
• encrypting data of said memory access request using said encrypted counter value responsive to determining that said memory access request is a write command;
• and
• decrypting data of said memory access request using said encrypted counter value responsive to determining that said memory access request is a read command.